XRT75L00D Datasheet, PDF (45/92 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

REV. 1.0.2
XRT75L00D
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
TABLE 16: REGISTER MAP DESCRIPTION
ADDRESS
(HEX)
TYPE
BIT LOCATION
SYMBOL
DESCRIPTION
DEFAULT
VALUE(BIN)
0x05 R/W
D0
REQEN Setting this bit to “1” enables the Receive Equalizer .
0
NOTE: See section 2.01 for detailed description.
D1
RxMON Writing a “1” to this bit configures the Receiver into
0
monitoring mode. In this mode, the Receiver can
monitor a signal at the RTIP/RRing pins that be atten-
uated up to 20dB flat loss.
D2
LOSMUT Writing a “1” to this bit causes the RPOS/RNEG out-
0
puts to be grounded while the LOS condition is
declared.
NOTE: If this bit has ben set, it will remain set evan
after LOS condition is cleared.
D3
RxClkINV Writing a “1” to this bit configures the Receiver to out-
0
put RPOS/RNEG data on the falling edge of RxClk.
D4
ALOSDIS Writing a “1” to this bit disables the ALOS detector.
0
D5
DLOSDIS Writing a “1” to this bit disables the DLOS detector.
0
0x06 R/W
D0
SR/DR Writing a “1” to this bit configures the Receiver and
0
Transmitter into Single-Rail (NRZ) mode.
D1
STS-1/DS3 Writing a “1” to this bit configures the channel 0 into
0
STS-1 mode.
NOTE: This bit field is ignored if the chip is configured
to operate in E3 mode.
D2
E3
Writing a “1” to this bit configures the chip in E3
0
mode.
D3
LLB
Writing a “1” to this bit configures the chip in Local
0
Loopback mode.
D4
RLB
Writing a “1” to this bit configures the chip in Remote
0
Loopback mode.
RLB
0
0
1
1
LLB
Loopback Mode
0
Normal Operation
1
Analog Local
0
Remote
1
Digital
D5
PRBSEN Writing a “1” to this bit enables the PRBS generator/
0
detector.PRBS generator generate and detect either
2¹⁵-1 (DS3 or STS-1) or 2²³-1 (for E3).
The pattern generated and detected are unframed
pattern.
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