XRT75L00D Datasheet, PDF (11/92 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

REV. 1.0.2
RECEIVE INTERFACE
PIN #
SIGNAL NAME
25
RxON/
SDI
23
REQEN
36
RxClk
24
RxClkINV/
CS
38
RPOS
XRT75L00D
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
TYPE
I
I
O
I
O
DESCRIPTION
Receiver Turn ON Input or Serial Data Input:
Function of this pin depends on whether the XRT75L00D is configured to oper-
ate in Hardware mode or Host mode.
In Hardware mode, setting this input pin “High” turns on and enables the
Receiver..
NOTES:
1. If the XRT75L00D is configured in HOST mode, this pin functions as
SDI input pin (please refer to the pin description for Microprocessor
Interface)
2. This pin is internally pulled down.
Receive Equalization Enable Input
Setting this input pin "High" enables the Internal Receive Equalizer. Setting this
pin "Low" disables the Internal Receive Equalizer.
NOTES:
1. This input pin is ignored and may be connected to GND if the
XRT75L00D is operating in the HOST Mode
2. This pin is internally pulled down.
Receive Clock Output
The Recovered Clock signal from the incoming line signal is output through this
pin.By default, the Receiver Section outputs data via RPOS and RNEG pins on
the rising edge of this clock signal.
Configure the Receiver Section to update data on the RPOS and RNEG pins on
the falling edge of RxClk by doing the following:
a) Operating in Hardware mode, pull the RxClkINV pin to “High”.
b) Operating in Host mode, write a “1” to RxClkINV bit field within the Receive
Control Register.
RxClk INVERT or Chip Select:
Function of this pin depends on whether the XRT75L00D is configured to oper-
ate in Hardware mode or Host mode.
In Hardware mode, setting this input pin “High” configures the Receiver Sec-
tion to invert the RxClk output signals and outputs the recovered data via
RPOS and RNEG on the falling edge of RxClk.
NOTE: If the XRT75L00D is configured in HOST mode, this pin functions as CS
input pin (please refer to the pin description for Microprocessor
Interface).
Receive Positive Data Output
This output pin pulses “High" whenever the XRT75L00D has received a Posi-
tive Polarity pulse in the incoming line signal at the RTIP/RRing inputs.
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