XRT75L00D Datasheet, PDF (16/92 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

XRT75L00D
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. 1.0.2
CONTROL AND ALARM INTERFACE
17
LLB
I Local Loop-back
This input pin along with RLB configures different Loop-Back modes.
18
RLB
RLB
0
0
1
1
LLB
Loopback Mode
0
Normal Operation
1
Analog Local
0
Remote
1
Digital
NOTE: This input pin is ignored and may be connected to GND if the
XRT75L00D is operating in the HOST Mode.
I Remote Loop-back
This input pin along with LLB configures different Loop-Back modes.
NOTE: This input pin is ignored and should be connected to GND if the
XRT75L00D is operating in the HOST Mode.
MICROPROCESSOR SERIAL INTERFACE - (HOST MODE)
PIN #
SIGNAL NAME
TYPE
DESCRIPTION
24
CS/RxClkINV
I
Microprocessor Serial Interface - Chip Select
Tie this “Low” to enable the communication with Serial Microprocessor Inter-
face.
NOTE: If the XRT75L00D is configured in Hardware Mode,this pin functions as
RxClkINV.
26 SCLK/TxClkINV
I
Serial Interface Clock Input
The data on the SDI pin is sampled on the rising edge of this signal. Addition-
ally, during Read operations the Microprocessor Serial Interface updates the
SDO output on the falling edge of this signal.
NOTE: If the XRT75L00D is configured in Hardware Mode, this pin functions as
TxClkINV.
25
SDI/RxON
I
Serial Data Input:
Data is serially input through this pin.
The input data is sampled on the rising edge of the SCLK pin (pin 26).
NOTES:
1. This pin is internally pulled down
2. If the XRT75L00D is configured in Hardware Mode, this pin functions
as RxON.
27
SDO/RxMON
O Serial Data Output:
This pin serially outputs the contents of the specified Command Register during
Read Operations. The data is updated on the falling edge of the SCLK and this
pin is tri-stated upon completion of data transfer.
NOTE: If the XRT75L00D is configured in Hardware Mode, this pin functions as
RxMON.
11