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NS9360B-0-C177 Datasheet, PDF (65/68 Pages) List of Unclassifed Manufacturers – This table lists the key features of the NS7520
Serial internal/external timing
Serial internal/external timing
Operating conditions:
Temperature:
Voltage:
Output load:
Input drive:
-15.00 (min)
1.60 (min)
25.0pf
CMOS buffer
110.00 (max)
1.40 (max)
Note:
SPI timing diagrams are in Chapter 10, "Serial Controller Module." See Figure 25, "SPI
master mode 0 and 1 two-byte transfer," on page 219 and Figure 26, "SPI slave mode 0
and 1 two-byte transfer," on page 222. Only SPI modes 0 and 1 are supported.
Serial internal timing characteristics
Num
Description
Min
Max
76
SCLK to ENABLE high
1
77
SCLK to TXD (PORTA7/C7)
78
RXD (PORTA3/C3) setup to SCLK
1 TSYS*
1
79
RXD hold to SCLK
1
* The TSYS parameter represents one period of the internal system clock.
Serial external timing characteristics
Num
Description
Min
Max
80
SCLK frequency
10
SCLK duty cycle
45
55
81
SCLK to ENABLE
1
82
SCLK to TXD (PORTA7/C7)
83
RXD (PORTA3/C3) setup to SCLK
2TSYS*
2
84
RXD hold to SCLK
1.5
* The TSYS parameter represents one period of the internal system clock.
Unit
TSCLK
ns
ns
ns
Unit
MHz
%
TSCLK
ns
ns
ns
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