NS9360B-0-C177 Datasheet, PDF (31/68 Pages) List of Unclassifed Manufacturers – This table lists the key features of the NS7520

Oscillator Characteristics
Signal
CS[4:0]_, CAS[3:0], RW_, WE_, OE_
MDC, TXD[3:0], TXER, TXEN, TDO
Derating (ns/pF)
0.137
0.274
Table 8: Output buffer derating by load capacitance
Oscillator Characteristics
Figure 8 illustrates the recommended oscillator circuit details.
Rise/fall time. The max rise/fall time on the system clock input pin is 1.5ns when used
with an external oscillator.
Duty cycle. The duty cycle is system-dependent with an external oscillator. It affects the
setup and hold times of signals that change in the falling clock edges, such as WE_/OE_.
Recommendation: Use a 3.3V, 50±10% duty cycle oscillator with a 100 ohm series resistor
at the output. The PLLs can handle a 25% duty cycle clock (minimum high/low time
4.5nS).
3R3V
Rise time = 18ns;
0.8V to 2.0V
RESET_
U1
1 _NC
2
LVC04
R1
5
R2
4
10K
L13
SCANEN_
3 _{0 OHM}
A10
RESET_
Optional 36.864-55.296MHz Oscillator
3R3V
PLL bypassed - U1 & R2 OUT, R1 IN
TB1
Y2
C3
100nF
4
2
1
VCC
GND
TEST
3
OUT
SM_Oscillator
R11
100 OHM
NS7520
A 18.432MHz crystal or 55.296MHz
oscillator allows full speed operation.
C1
XTAL1
10pF
C2
X2
R3
1M
R4 _XTAL2
10pF 10-20MHz
0 OHM
PLL enabled - U1 & R2 IN, R1 OUT
K14 _XTAL1
K12 _XTAL2
Figure 8: Oscillator circuit details
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