NS9360B-0-C177 Datasheet, PDF (15/68 Pages) List of Unclassifed Manufacturers – This table lists the key features of the NS7520

Ethernet interface MAC
Ethernet interface MAC
Note:
ENDEC values for general-purpose output and TXD refer to bits in the Ethernet General
Control register. ENDEC values for general-purpose input and RXD refer to bits in the
Ethernet General Status register.
In this table, GP designates general-purpose.
Symbol
MII
MDC
ENDEC
GP output
MDIO
TXCLK
TXD3
TXD2
TXD1
TXD0
TXER
TXEN
TXCOL
RXCRS
RXCLK
RXD3
RXD2
RXD1
RXD0
RXER
RXDV
GP output
GP output
GP output
GP output
TXD
GP output
GP input
GP input
GP input
RXD
GP input
GP input
Pin
I/O OD Description
MII
ENDEC
D10
O
2
MII
State of (LPBK bit XOR
management (Mode=SEEQ))
clock
B10 U I/O
2
MII data
State of UTP_STP bit
C10
I
TX clock
A12
O
2
TX data 3
State of AUI_TP[0] bit
B11
O
2
TX data 2
State of AUI_TP[1] bit
D11
O
2
TX data 1
Inverted state of PDN bit, open
collector
A11
O
2
TX data 0
Transmit data
A13
O
2
TX code error State of LNK_DIS_ bit
B12
O
2
TX enable
A14
I
Collision
D12
I
Carrier sense
C12
I
RX clock
D14
I
RX data 3
Read state in bit 12
B15
I
RX data 2
Read state in bit 15
A15
I
RX data 1
Read state in bit 13
B13
I
RX data 0
Receive data
C15
I
RX error
Read state in bit 11
D15
I
RX data valid Read state in bit 10
Ethernet interface MAC signal descriptions
The Ethernet MII (media independent interface) provides the connection between the Ethernet PHY
and the MAC (media access controller).
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