CH7003B Datasheet, PDF (42/50 Pages) List of Unclassifed Manufacturers – Digital PC to TV Encoder

CHRONTEL
Register Descriptions (continued)
Table 27. Clock Output Selection
SCO[2:0]
000
001
010
011
100
101
110
111
Buffered Clock Output
14 MHz crystal
(For test use only)
VCO divided by K3 (see Table 28 )
Field ID signal
(for test use only)
(for test use only)
TV horizontal sync (for test use only)
TV vertical sync (for test use only)
Table 28. K3 Selection
SHF[2:0]
K3
000
2.5
001
3
010
3.5
011
4
100
4.5
101
5
110
6
111
7
Sub-carrier Value Registers
Bit:
7
6
5
4
Symbol:
Type:
Default:
3
FSCI#
R/W
CH7003B
Symbol: FSCI
Address: 018H - 1FH
Bits: 4 each
2
FSCI#
R/W
1
FSCI#
R/W
0
FSCI#
R/W
The lower four bits of registers18H through 1F contain a 32-bit value which is used as an increment value for the
ROM address generation circuitry. the bit locations fare shown below:
Register
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
Contents
FSCI[31:28]
FSCI[27:24]
FSCI[23:20]
FSCI[19:16]
FSCI[15:12]
FSCI[11:8]
FSCI[7:4]
FSCI[3:0]
42
201-0000-023 Rev.4.1, 8/2/99