CH7003B Datasheet, PDF (37/50 Pages) List of Unclassifed Manufacturers – Digital PC to TV Encoder

CHRONTEL
CH7003B
Register Descriptions (continued)
Vertical Postiion Register
Symbol: VPR
Address: 0BH
Bits: 8
Bit:
7
6
5
4
3
2
1
0
Symbol: VP7
VP6
VP5
VP4
VP3
VP2
VP1
VP0
Type:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default:
0
0
0
0
0
0
0
0
This register is used to shift the displayed TV image in a vertical direction (up or down) to achieve a vertically cen-
tered image on screen. This bit field, VP[8:0] represents the TV line number (relative to the VGA vertical sync)
used to initiate the generation and insertion of the TV vertical interval (i.e., the first sequence of equalizing pulses).
Increasing values delay the output of the TV vertical sync, causing the image position to move UP on the TV screen.
Decreasing values, therefore, move the image position DOWN. Each increment moves the image position by one
TV line (approximately 2 VGA lines). The maximum value that should be programmed into the VP[8:0] value is
the number of TV lines minus 1, divided by 2 (262, 312 or 313). When panning the image up, the number should be
increased until (TVLPF-1) / 2 is reached; the next step should be to reset the value to zero. When panning the image
down the screen, the VP[8:0] value should be decremented until the value zero is reached. The next step should set
the value to (TVLPF-1) / 2, and then decrementing can continue. If this value is programmed to a number greater
than (TV lines per frame-1) /2, a TV vertical SYNC will not be generated.
Sync Polarity Register
Symbol: SPR
Address: 0DH
Bits: 4
Bit:
7
6
5
4
3
2
1
0
Symbol:
DES
SYO
VSP
HSP
Type:
R/W
R/W
R/W
R/W
Default:
0
0
0
0
This register provides selection of the synchronization signal input to, or output from, the CH7003.
• HSP (bit 0) is Horizontal Sync Polarity - an HSP value of zero means the horizontal sync is active low, and a
value of one means the horizontal sync is active high.
• VSP (bit 1) is Vertical Sync Polarity - a VSP value of zero means the vertical sync is active low, and a value
of one means the vertical sync is active high.
• SYO (bit 2) is Sync Direction - a SYO value of zero means that H and V sync are input to the CH7003. A
value of one means that H and V sync are output from the CH7003.
• DES (bit 3) is Detect Embedded Sync - a DES value of zero means that H and V sync will be obtained from
the direct pin inputs. A DES value of one means that H and V sync will be detected from the embedded codes
on the pixel input stream. Note that this will only be valid for the YCrCb input modes.
Note: When sync direction is set to be an output, horizontal sync will use a fixed pulse width of 64 pixels and vertical
sync will use a fixed pulse width of 2 lines.
201-0000-023 Rev 4.1, 8/2/99
37