80-0206-R Datasheet, PDF (32/49 Pages) List of Unclassifed Manufacturers – Speech Recognition Processor

RSC-4128
Data Sheet
Pulse Width Modulator (PWM) Analog Output
The PWM consists of circuitry to regulate the width of a pulse supplied to one of two outputs, PWM0 and PWM1,
over a period of programmable duration. One or the other of the two outputs is held at ground and the other is
driven with a pulse of programmable duration, giving “push-pull” drive. Both outputs have “low shoot-thru”
transistors to reduce radiated EMI. Once programmed, the PWM produces outputs continuously until register
values are changed. The PWM has both 8 and 10 bit modes. The PWM Control Register (‘pwmCtl”; register D7)
contains the PWM on/off control (Bit0), the sample period (Bits[3:2]), sample size selection controls (Bit5), and the
two least-significant bits of the 10-bit output value (Bits[7:6]). The sample size defaults to 8 bits, with register
D7.Bit5=0 (“tenBits”). A sample size of 10 bits is selected by setting “tenBits” =1. The PWM output impedance is
approximately 11 Ohms. Of the standard speaker impedances available, an 8 ohm speaker will provide optimal
volume when driven by the PWM.
The PWM contains two counters. The data value counter is programmed with the value programmed in the
“pwmData” register (register D8) in 8-bit mode. In 10-bit mode the data value counter uses “pwmData” and
appends Bits[7:6] of “pwmCtl” as the least significant two bits to create a 10 bit value. Output data always lags input
by one PWM sample period. The sample period counter is fixed and counts to 128. The prescaler in the PWM
control register (register D7.Bits[3:2]) determines the clock for both the data value counter and the sample period
counter. The prescaler divides the 14.3 MHz clock by 4,6, or 7, resulting in a PWM frequency of 27.9 KHz, 18.6Khz
and 15.97 KHz, respectively. The PWM restarts every sample period, at which time either PWM0 or PWM1 pulses
high. The selected signal pulses high for a duration determined by the data value and then returns low. The non-
selected signal remains low. The pulsed output selection is controlled by the sign of the data. When Bit 7 of the
“pwmData” register is 0, PWM0 pulses high while PWM1 remains 0. When Bit 7 of the “pwmData” register is 1,
PWM1 pulses high while PWM0 remains low. When the data value in “pwmData” is 0, both signals remain low.
When the sample period count selected by programming Bits[3:2] of the “pwmCtl” register D7.Bit has been
reached, the PWM restarts. The PWM hardware sample period and the software data value updating must be
synchronized to avoid aliasing.
The following table shows the rates and pulse durations obtained for 8-bit mode (“tenBits” programmed to “0”)
SOFTWARE NOTE: “Full scale” output for all prescaler values is obtained by setting the data value to 7FH, so 8-bit
signed data can be output at any of the three rates without amplitude adjustment.
PWM timing for “tenBits”=0
Item
prescaler=4 prescaler=6
nsec/clock (period clock) 280
420
CLK1 clocks per period 512
768
nsec/clock
(sample 280
420
clock)
PWM frequency
27.9 kHz
18.6 kHz
pulse for data=01
4 H / 508 L 6 H / 762 L
pulse for data=7F
508 H / 4L 762 H / 6 L
prescaler=7
490
896
490
15.97 kHz
7 H / 889 L
889 H / 7 L
For 10-bit mode (“tenBits” programmed to “1”), the sample period counter counts a full 7-bits (128 counts), exactly
as when TenBits is 0. The 14.3 MHz clock is divided by the prescaler value and supplied to the sample period
counter. The data value counter is clocked by the 14.3 clock divided by 2 for prescaler values 6 or 7, and is clocked
directly by the 14.3 MHz clock when the prescaler value is 4. Table YY shows the rates and pulse durations
obtained with TenBits set to 1. SOFTWARE NOTE: “Full scale” output is obtained with a different data value for
each prescaler value. Only prescaler=4 supports a full 9-bit count (512), so true 10-bit signed data can be output
only with prescaler=4. Otherwise the amplitudes must be adjusted to have maximum amplitude of 447
(prescaler=7) or 383 (prescaler=6). See “Additional considerations using the PWM for 10-bit Data” below.
32
P/N 80-0206-R
© 2006 Sensory Inc.