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80-0206-R Datasheet, PDF (16/49 Pages) List of Unclassifed Manufacturers – Speech Recognition Processor | |||
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RSC-4128
Data Sheet
The programming of the Extended Addressing Register (âextAddâ) is independent of whether the ROM is external
or internal. That is, an external ROM mirrors an internal ROM exactly. This allows products to be developed with
external ROM and masked with the same binary in an internal ROM part.
Note: Unlike the RSC-3x, the last 256 bytes of Data Space are not allocated for internal processor functions. All
internal processor functions are mapped to the SFR area of Register space, leaving all Data space addresses
potentially accessible as external memory.
There are 8 data bus lines. These pins are bi-directional: they are normally inputs except when there is an external
write to Code Space or Data Space. These pins, D[7:0], have weak pull-up devices (~100K ohm) to keep them
from floating when no device is driving the data bus.
External Memory Interface Control Signals
There are 4 active low read/write strobes for reading from and writing to external Constant/Code Space or Data
Space: -RDR, -WRC, -RDF, -WRD. To support cost effective software development for large memory spaces
the external memory strobes are different from earlier RSC chips. The âRDR signal replaces the previous âRDC
signal and the âRDF signal replaces the previous âRDD signal. The âXM pin replaces the previous âXML and
âXMH pins on earlier RSC devices. The âWRC signal and the âWRD signal are the same as in previous RSC
chips. (See âDC Characteristicsâ section for electrical characteristics.)
The 20-bit extended address for a memory-reference instruction or a code fetch may be directed to the internal
ROM, or it may be directed to an external ROM or flash. The address is always an external address if:
1) the instruction is MOVX read and the ârwâ bit is set, or
2) the instruction is MOVX write, or
3) the âXM pin is low, or
4) the instruction is a MOVC write
Otherwise the address is internal.
The âXM pin is an active low input pin that disables internal ROM when pulled low, and forces the use of external
memory for Constant/Code Space. Write accesses to Constant/Code Space (MOVC write; âWRC active) are
always directed off-chip. The -XM pin has a weak pull-up device (~10K ohm) to enable the internal ROM when no
connection is made to this pin. At the end of reset -XM is sampled and, if pulled low externally, the internal 10K
ohm pull-up device is disabled.
The âRDR signal goes low when the âXM pin is held low and either
1) the chip executes an instruction fetch, or
2) the chip executes a MOVC read instruction, or
3) the chip executes a MOVX read instruction and the ârwâ bit is zero.
This active low signal is used to enable an external ROM or other external memory containing both executable
code and fixed, read-only data.
The âRDF signal goes low when the chip executes a MOVX read instruction and the ârwâ bit is set to 1. This active
low signal is used to read an external flash or other external memory that is used solely for the purpose of Data
Space, either read-only fixed data or read-write dynamic data.
The âWRD signal goes low when the processor executes a MOVX write instruction. The âWRC signal goes low
when the processor executes a MOVC write instruction. These signals do not depend on the contents of the
Extended Address Register or the âXM signal, since a write by definition cannot be done to internal ROM. See the
diagram below for a visual representation of the read and write configurations for internal and external addressing:
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P/N 80-0206-R
© 2006 Sensory Inc.
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