LM3S1620 Datasheet, PDF (9/485 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S1620 Microcontroller
Figure 15-1. Analog Comparator Module Block Diagram ..................................................................... 370
Figure 15-2. Structure of Comparator Unit .......................................................................................... 371
Figure 15-3. Comparator Internal Reference Structure ........................................................................ 372
Figure 16-1. PWM Module Block Diagram .......................................................................................... 382
Figure 16-2. PWM Count-Down Mode ................................................................................................ 383
Figure 16-3. PWM Count-Up/Down Mode .......................................................................................... 384
Figure 16-4. PWM Generation Example In Count-Up/Down Mode ....................................................... 384
Figure 16-5. PWM Dead-Band Generator ........................................................................................... 385
Figure 17-1. QEI Block Diagram ........................................................................................................ 418
Figure 17-2. Quadrature Encoder and Velocity Predivider Operation .................................................... 420
Figure 18-1. Pin Connection Diagram ................................................................................................ 435
Figure 21-1. Load Conditions ............................................................................................................ 453
Figure 21-2. I²C Timing ..................................................................................................................... 455
Figure 21-3. Hibernation Module Timing ............................................................................................. 455
Figure 21-4. SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 456
Figure 21-5. SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 456
Figure 21-6. SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 457
Figure 21-7. JTAG Test Clock Input Timing ......................................................................................... 458
Figure 21-8. JTAG Test Access Port (TAP) Timing .............................................................................. 458
Figure 21-9. JTAG TRST Timing ........................................................................................................ 458
Figure 21-10. External Reset Timing (RST) .......................................................................................... 459
Figure 21-11. Power-On Reset Timing ................................................................................................. 460
Figure 21-12. Brown-Out Reset Timing ................................................................................................ 460
Figure 21-13. Software Reset Timing ................................................................................................... 460
Figure 21-14. Watchdog Reset Timing ................................................................................................. 460
Figure 22-1. 100-Pin LQFP Package .................................................................................................. 461
September 02, 2007
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Preliminary