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LM3S1620 Datasheet, PDF (440/485 Pages) List of Unclassifed Manufacturers – Microcontroller
Signal Tables
Pin Number
91
92
93
94
95
96
97
Pin Name
PB5
C1-
PB4
C0-
VDD
GND
PD4
CCP3
PD5
GNDA
98
VDDA
99
PD6
Fault
100
PD7
IDX0
Pin Type
I/O
I
I/O
I
-
-
I/O
I/O
I/O
-
-
I/O
I
I/O
I
Buffer Type Description
TTL
GPIO port B bit 5
Analog Analog comparator 1 negative input
TTL
GPIO port B bit 4
Analog Analog comparator 0 negative input
Power Positive supply for I/O and some logic.
Power Ground reference for logic and I/O pins.
TTL
GPIO port D bit 4
TTL
Capture/Compare/PWM 3
TTL
GPIO port D bit 5
Power
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Power
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
TTL
GPIO port D bit 6
TTL
PWM Fault
TTL
GPIO port D bit 7
TTL
QEI module 0 index
Table 19-2. Signals by Signal Name
Pin Name
C0+
C0-
C0o
C1+
C1-
C1o
C2+
C2-
CCP0
CCP1
CCP2
CCP3
CMOD0
Pin Number
90
92
58
24
91
46
23
22
66
34
67
95
65
Pin Type
I
I
O
I
I
O
I
I
I/O
I/O
I/O
I/O
I/O
CMOD1
76
I/O
Fault
GND
GND
99
I
9
-
15
-
Buffer Type Description
Analog Analog comparator 0 positive input
Analog Analog comparator 0 negative input
TTL
Analog comparator 0 output
Analog Analog comparator positive input
Analog Analog comparator 1 negative input
TTL
Analog comparator 1 output
Analog Analog comparator positive input
Analog Analog comparator 2 negative input
TTL
Capture/Compare/PWM 0
TTL
Capture/Compare/PWM 1
TTL
Capture/Compare/PWM 2
TTL
Capture/Compare/PWM 3
TTL
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
TTL
PWM Fault
Power Ground reference for logic and I/O pins.
Power Ground reference for logic and I/O pins.
440
September 02, 2007
Preliminary