LM3S328 Datasheet, PDF (84/371 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Bit/Field
11
Name
BYPASS
Type
R/W
10
PLLVER
R/W
9:6
XTAL
R/W
Oscillator-Related Bits
5:4
OSCSRC
R/W
3
IOSCVER
R/W
2
MOSCVER
R/W
1
IOSCDIS
R/W
0
MOSCDIS
R/W
Reset
1
Description
PLL Bypass
Chooses whether the system clock is derived from the PLL
output or the OSC source. If set, the clock that drives the
system is the OSC source. Otherwise, the clock that drives
the system is the PLL output clock divided by the system
divider.
Note:
The ADC module must be clocked from the PLL or
directly from a 14-MHz to an 18-MHz clock source
in order to operate properly.
0
PLL Verification
This bit controls the PLL verification timer function. If set,
the verification timer is enabled and an interrupt is
generated if the PLL becomes inoperative. Otherwise, the
verification timer is not enabled.
0xB
This field specifies the crystal value attached to the main
oscillator. The encoding for this field is provided in Table 6-4
on page 85.
0x0
Picks among the four input sources for the OSC. The
values are:
Value
00
01
10
11
Input Source
Main oscillator (default)
Internal oscillator
Internal oscillator / 4 (this is necessary if used
as input to PLL)
reserved
0
This bit controls the internal oscillator verification timer
function. If set, the verification timer is enabled and an
interrupt is generated if the timer becomes inoperative.
Otherwise, the verification timer is not enabled.
0
This bit controls the main oscillator verification timer
function. If set, the verification timer is enabled and an
interrupt is generated if the timer becomes inoperative.
Otherwise, the verification timer is not enabled.
0
Internal Oscillator Disable
0: Internal oscillator is enabled.
1: Internal oscillator is disabled.
0
Main Oscillator Disable
0: Main oscillator is enabled.
1: Main oscillator is disabled.
84
April 27, 2007
Preliminary