LM3S328 Datasheet, PDF (324/371 Pages) List of Unclassifed Manufacturers – Microcontroller

Inter-Integrated Circuit (I2C) Interface
Table 14-3. Write Field Decoding for I2CMCS[3:0] Field (Sheet 3 of 3)
Current
State
I2CMSA[0]
R/S
ACK
I2CMCS[3:0]
STOP START
RUN
Description
Master
Receive
X
0
0
0
1
RECEIVE operation with negative ACK
(master remains in Master Receive state).
X
X
1
0
0
STOP condition (master goes to Idle
state).^b
X
0
1
0
1
RECEIVE followed by STOP condition
(master goes to Idle state).
X
1
0
0
1
RECEIVE operation (master remains in
Master Receive state).
X
1
1
0
1
Illegal.
1
0
0
1
1
Repeated START condition followed by
RECEIVE operation with a negative ACK
(master remains in Master Receive state).
1
0
1
1
1
Repeated START condition followed by
RECEIVE and STOP condition (master
goes to Idle state).
1
1
0
1
1
Repeated START condition followed by
RECEIVE (master remains in Master
Receive state).
0
X
0
1
1
Repeated START condition followed by
SEND (master goes to Master Transmit
state).
0
X
1
1
1
Repeated START condition followed by
SEND and STOP condition (master goes
to Idle state).
All other combinations not listed are non-operations.
NOP.
a. An X in a table cell indicates that applies to a bit set to 0 or 1.
b. In Master Receive mode, a STOP condition should be generated only after a Data Negative Acknowledge executed by the
master or an Address Negative Acknowledge executed by the slave.
324
April 27, 2007
Preliminary