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LM3S328 Datasheet, PDF (356/371 Pages) List of Unclassifed Manufacturers – Microcontroller
Electrical Characteristics
Table 18-9. ADC Characteristics (Continued)
Parameter
Parameter Name
N
fADC
tADCCONV
fADCCONV
INL
DNL
OFF
GAIN
Resolution
ADC internal clock frequency
Conversion time
Conversion rate
Integral nonlinearity
Differential nonlinearity
Offset
Gain
a. tADC = 1/fADC clock
18.2.5 I2C
Min
Nom
Max
Unit
-
10
-
bits
7
8
9
MHz
-
-
16
tADC cyclesa
438
500
563
k samples/s
-
-
±1
LSB
-
-
±1
LSB
-
-
+2
LSB
-
-
±2
LSB
Table 18-10. I2C Characteristics
Parameter
No.
Parameter
Parameter Name
Min
Nom
Max
Unit
I1a
tSCH
Start condition hold time
36
-
-
system
clocks
I2a
tLP
Clock Low period
I3b
tSRT
I2CSCL/I2CSDA rise time
(VIL=0.5 V to VIH=2.4 V)
I4a
tDH
Data hold time
36
-
-
system
clocks
-
-
(see
ns
note b)
2
-
-
system
clocks
I5c
tSFT
I2CSCL/I2CSDA fall time
(VIH=2.4 V to VIL=0.5 V)
I6a
tHT
Clock High time
-
9
24
-
10
ns
-
system
clocks
I7a
tDS
Data setup time
18
-
-
system
clocks
I8a
tSCSR
Start condition setup time (for repeated
36
-
-
system
start condition only)
clocks
I9a
tSCS
Stop condition setup time
24
-
-
system
clocks
a. Values depend on the value programmed into the TPR bit in the I2C Master Timer Period (I2CMTPR) register (see page 326); a
TPR programmed for the maximum I2CSCL frequency (TPR=0x2) results in a minimum output timing as shown in the table
above. The I2C interface is designed to scale the actual data transition time to move it to the middle of the I2CSCL Low period.
The actual position is affected by the value programmed into the TPR; however, the numbers given in the above values are
minimum values.
356
April 27, 2007
Preliminary