LM3S328 Datasheet, PDF (113/371 Pages) List of Unclassifed Manufacturers – Microcontroller

8.1 Block Diagram
Figure 8-1. GPIO Module Block Diagram
LM3S328 Data Sheet
PA0
PA1
PA2
PA3
PA4
PA5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
8.2
U0Rx
UART0
PE0
U0Tx
PE1
SSIClk
SSIFss
SSI
SSIRx
PD0
SSITx
PD1
UART1
U1Rx
U1Tx
PD2
PD3
CCP0 Timer0 CCP1
CCP2 Timer1 CCP3
TCK/SWCLK
PC0
I2CSCL
I²C
I2CSDA
TMS/SWDIO
PC1
TRST JTAG
TDI
PC2
TDO/SWO
PC3
PC4
PC5
PC6
CCP5 Timer2 CCP4
PC7
Functional Description
Important: All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the
exception of the five JTAG pins (PB7 and PC[3:0]. The JTAG pins default to their
JTAG functionality (GPIOAFSEL=1). Asserting a Power-On-Reset (POR) or an
external reset (RST) puts both groups of pins back to their default state.
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 8-2).
The LM3S328 microcontroller contains five ports and thus five of these physical GPIO blocks.
April 27, 2007
113
Preliminary