QL82SD Datasheet, PDF (47/60 Pages) List of Unclassifed Manufacturers – 10 High Speed Bus LVDS Serial Links bandwidth up to 5 Gbps

Pin Type Description
QL82SD Device Data Sheet Rev C
General Pins
Table 37: General Pin Descriptions
Type
Description
IN Input. A standard input-only signal
OUT Totem pole output. A standard active output driver
T/S Tri-state. A bi-directional, tri-state input/output pin
Table 38: General Pin/Bus Descriptions
Pin/Bus Name Type
Function
VCC
IN Supply pin. Tie to 2.5 V supply.
VCCIO
IN
Supply pin for I/O. Set to 2.5 V for 2.5 V I/O, 3.3 V for
3.3 V compliant I/O, or refer to the I/O Standards table.
INREF
Differential I/O Reference Voltage, refer to Differential
IN Voltage Table. Connect to GND when using TTL, PCI or
LVCMOS
VCCREC
IN LVDS Receiver VCC Supply. Connect to 3.3 V
VCCPLL
IN PLL VCC Supply. Connect to 2.5 V
IOCTRL
IN Low Skew I/O Control Pins. Tie to GND if unused
GNDPLL
IN Tie to GND
CLK/PLLIN
IN
Programmable Global Clock Pin or Programmable PLL
Input. Tie to VCC or GND if unused
CLK/DEDCLK/PLLIN IN Dedicated Global Clock Pin or Programmable PLL Input.
PLLOUT
OUT Programmable PLL Output
PLLRST
IN Programmable PLL Reset. Tie to VCC if the PLL is unused.
GND
IN Ground pin. Tie to GND on the PCB.
T/GND
IN
Thermal Ground. Used to dissipate heat from the device.
Tie to GND on the PCB.
I/O
T/S Programmable Input/Output/Tri-State/Bi-directional Pin.
CLK
IN
Programmable Global Clock Pin. Tie to VCC or GND if
unused.
TDI
IN JTAG Data In. Tie to VCC if unused.
TDO
OUT JTAG Data Out. Leave unconnected if unused.
TCK
IN JTAG Clock. Tie to GND if unused.
TMS
IN JTAG Test Mode Select. Tie to VCC if unused.
TRSTB
IN JTAG Reset. Tie to GND if unused.
NC
OUT Must be isolated and floating at all times
© 2002 QuickLogic Corporation
Preliminary
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