QL82SD Datasheet, PDF (19/60 Pages) List of Unclassifed Manufacturers – 10 High Speed Bus LVDS Serial Links bandwidth up to 5 Gbps

QL82SD Device Data Sheet Rev C
pad_Ch0_p/n
Ch0_rxclk
Ch0_rxd[9:0]
t _DD
t _RXPD
A
B
Ch0_txclk
Figure 23: 10:1 Mode Deserializer Receive with Embedded Clock
2.0V
Enable
Chx_txclk
Pad_Chx_p/n
Chx_lock
t _ZHLK
Chx-rxd
[N-1,0]
t _DSR1
SYNC patterns
t _{ZHR or}
t _ZLR
Data
0.8V
1.5V
SYNC Symbol or DIN0-9
tHZR _or tLZR
Chx_rxclk
OE
Figure 24: Deserializer PLL Lock Time from Power Down
VCC
Enable
0.8V
0.0V
Chx_txclk
Pad_Chx_p/n
Chx_lock
Chx-rxd
[N-1,0]
t _DSR2
SYNC patterns
tZHR _or
t _ZLR
Data
1.2V
1.0V
SYNC Symbol or DIN0-9
t _{HZR or} t _LZR
Chx_rxclk
OE
Figure 25: 10:1 Mode Deserializer PLL Lock Time from SYNCPAT
© 2002 QuickLogic Corporation
Preliminary
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