SD1010D Datasheet, PDF (34/40 Pages) List of Unclassifed Manufacturers – Digital Interface VGA TFT LCD Display Controller

Panel_on
1
Man_hsize_value 11
Shift_hbp_digital
1
Forward
1
Rom_clk_sel
6
Control_F
8
Data high threshold 8
Data low threshold 8
Edge threshold
8
6AH,6BH, when either man_iq_valid or iq_valid is asserted
6CH
RW 6DH[0] 1: turn on all the outputs to the panel
0: disable outputs to the panel (need to disable
EEPROM 265H[3], 266H[7], 266H[3], 267H[7],
267H[3] to get complete output disable).
R 6EH[2:0], Read only register containing value of hsize when
6FH man_hsize_valid is asserted. (not used in sd1010d)
RW 70H[7] Move picture in left-right direction in digital mode
RW 70H[6] 1: move picture to left
0: move picture to right
Used mainly to compensate in the unlikely event when
data and de are unalign coming into the SD1010D
RW 70H[5:0] Divisor value use to divide fast pwm_free_clk to
slower free_clk
RW 71H Control Register F
Bit[2:0]: Dithering Mode
0: compatible with SD1000
1-5: new schemes
Bit[6:3]: reserved
Bit[7]: gamma enable
Default is 00H
RW 72H High water mark for valid data.
If the data is larger than this threshold, it is considered
High internally
RW 73H Low water mark for valid data.
If the data is smaller than this threshold, it is
considered LOW internally
RW 74H Minimum difference between the data value of two
adjacent pixels to be considered as an edge.
Control Flow
When SD1010D is powered up, the reference system and SD1010D will perform the following
functions in sequence:
1. System will generate a Power-On Reset to SD1010D.
2. Once the SD1010D receives the Reset, SD1010D will load the contents of EEPROM and
start the auto-detection process.
3. In the meantime, the external CPU can change the contents of the control registers of the
SD1010D. If necessary, the external CPU can send an additional Reset to restart the whole
process.
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