SD1010D Datasheet, PDF (31/40 Pages) List of Unclassifed Manufacturers – Digital Interface VGA TFT LCD Display Controller

R Value
Advanced Processing 8
G Value
Advanced Processing 8
B Value
Brightness
8
Adjustment
Pixel Comparison
8
Value
Status 2
8
Recovery Control
8
Phase Range
4
Phase Track
24
Waiting Time
Quick Phase
1
Enable
PWM Enable
1
Standalone Enable 1
Digital Enable
1
Phase Offset
10
Phase Total
10
Man_hsize_valid
1
Man_iq_valid
1
Default is 00H
RW 3FH[7:0] Value For Advanced Post Processing G
Default is 00H
RW 40H[7:0] Value For Advanced Post Processing B
Default is 00H
RW 41H[7:0] The Adjust Amount For Reducing/Increasing
Brightness. Default is 00H.
RW 42H[7:0] The Value To Compare The Incoming Pixel Data.
Default is 00H.
R 43H[7:0] The Status Register 2
Bit [1:0]: Result for comparing the selected incoming
pixel with “Pixel Comparison Value”:
0: invalid
1: incoming pixel > “Pixel Comparison Value”
2: incoming pixel = “Pixel Comparison Value”
3: incoming pixel < “Pixel Comparison Value”
Bit [2]: Status for brightness control
0: Normal, no underflow/overflow
1: brightness reduced too much causes
underflow/increased too much causes overflow
Bit [7:3]: Reserved
RW 44H Clock Recovery Control Register:
Default value is 71H
Bit 0: clock frequency is divisible by 2
Bit 1: clock frequency is divisible by 4
Bit 2: clock frequency is divisible by 8
Bit 3: enable phase tracking feature
Bit 4: enable auto phase calibration
Bit 5: enable auto frequency calibration
Bit 6: enable auto mode detection
Bit 7: enable operation at half clock speed (not used)
RW 45H Offset value added to the calibrated phase when phase
tracking occurs
RW 46H Number of frames waited before phase tracking occurs
48H
RW 49H[0] 0: Normal phase calibration (default)
1: Final phase = phase total – phase offset
RW 49H[1] 0: Disable auto phase total calculation
1: Enable auto phase total calculation (default)
RW 49H[2] 0: Uses the external incoming SYNC signals
(default)
1: Allow the use of the default SYNC signals
instead of the incoming SYNC signals
RW 49H[3] 0: Analog interface
1: Digital interface (no auto calibration)
should be set at 1
RW 4AH Offset value subtracted from phase total when doing
4BH quick phase calculation
RW 4CH User defined value for a particular frequency
4DH
R 4EH[4] Indicates when hsize value is ready for cpu to read in
man_freq_state. Read only
R 4EH[3] Indicates when image quality is ready for cpu to read in
man_phase_state. Read only
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