82C881 Datasheet, PDF (25/46 Pages) List of Unclassifed Manufacturers – FireLink 1394 OHCI Link Controller

FireLink 1394 OHCI
82C881
5.2.2 Rx FIFO-Related Registers
7
6
5
4
3
2
1
0
OFST 10h
Miscellaneous Rx Configuration Register
Default = 00h
Holds configuration data for Combined sub-FIFO; contains data quadlets for Iso Receive, AR Response and Self ID packets.
Byte 0
Reserved
OFST 11h
Byte 1
Default = 00h
Read Watermark bits [5:0] - If the number of quadlets in the sub-FIFO is greater than or equal to this
value, the corresponding DMA controller can start a burst read of the data from the sub FIFO.
Reserved
OFST 12h
Byte 2
Default = 01h
Sub-FIFO Size bits [3:0]
Read Watermark bits [9:6]
OFST 13h
Byte 3
Default = 20h
Reserved
Sub-FIFO Size bits [9:4]
OFST 14h
Asynchronous Rx Request Configuration Register
Holds configuration Data for AR Request sub-FIFO.
Byte 0
Default = 00h
Reserved
OFST 15h
Byte 1
Default = 00h
Read Watermark bits [5:0]
Reserved
OFST 16h
Byte 2
Default = 01h
Sub-FIFO Size bits [3:0]
Read Watermark bits [9:6]
OFST 17h
Byte 3
Default = 10h
Reserved
Sub-FIFO Size bits [9:4]
OFST 18h
Physical Rx Request Configuration Register
Holds configuration Data for Physical Receive Request sub-FIFO.
Byte 0
Default = 00h
Reserved
OFST 19h
Byte 1
Default = 00h
Read Watermark bits [5:0]
Reserved
OFST 1Ah
Byte 2
Default = 01h
Sub-FIFO Size bits [3:0]
Read Watermark bits [9:6]
OFST 1Bh
Byte 3
Default = 10h
Reserved
Sub-FIFO Size bits [9:4]
912-2000-031
Revision: 1.0
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