82C881 Datasheet, PDF (14/46 Pages) List of Unclassifed Manufacturers – FireLink 1394 OHCI Link Controller

FireLink 1394 OHCI
82C881
3.4.3 Miscellaneous Signals
Signal Name
Pin
No.
Pin
Type
TMS
78
I
TEST#
RST#
77
I
76
I
G_RST#
SCL
SDA
GPIO2-3
10
I
4
I/O
5
I/O
2, 3
I/O
Signal Description
Test Mode Select: The 82C881 logic can be strapped into Test Mode for two
types of tests: NAND tree and Boundary Scan. Details are provided in the Test
Modes section of this document.
This pin must be strapped high for Normal Operation.
Test Scan Enable: This pin is used solely for Test Mode operations and should
be strapped either high or low for Normal Operation.
PCI Reset: The PCI interface and standard register set of the 82C881 Link
Controller is reset to its default state by this line, which must be held active for at
least ?????? PCI clocks to be effective. PCI Power Management registers and
Vendor ID / Subsystem ID registers are not reset. All PCI outputs are tri-stated
when this line is asserted.
Global Reset: The 82C881 Link Controller is completely reset to its default state
by this line, which must be held active for at least ?????? PCI clocks to be
effective.
Serial Clock: This clock signal synchronizes data from an industry-standard
serial EEPROM.
Serial Data: This data line is used to send commands to and read data from an
industry-standard serial EEPROM. If no ROM is used, this line should be tied to
ground.
General Purpose I/O: The GPIO pins can be used by software and hardware for
any predefined purpose. They are controlled and monitored as inputs or outputs
through PCICFG 4Ch.
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Revision: 1.0