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M14D2561616A Datasheet, PDF (8/59 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks DDR II SDRAM
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ESMT
M14D2561616A
AC Operation Conditions & Timing Specification
AC Operation Conditions
Parameter
Symbol
Min.
-2.5/ 3
Max.
Unit Note
Input High (Logic 1) Voltage VIH(AC)
VREF + 0.2
V
Input Low (Logic 0) Voltage
VIL(AC)
VREF - 0.2
V
Input Differential Voltage
VID(AC)
0.5
VDDQ+0.6
V
1
Input Crossing Point Voltage VIX(AC) 0.5 x VDDQ - 0.175 0.5 x VDDQ + 0.175
V
2
Output Crossing Point Voltage VOX(AC) 0.5 x VDDQ - 0.125 0.5 x VDDQ + 0.125
V
2
Note:
1. VID(AC) specifies the input differential voltage |VTR – VCP| required for switching, where VTR is the true input signal (such
as CLK,DQS) and VCP is the complementary input signal (such as CLK , ). The minimum value is equal to VIH(AC) –
VIL(AC).
2. The typical value of VIX / VOX(AC) is expected to be about 0.5 x VDDQ of the transmitting device and VIX / VOX(AC) is
expected to track variations in VDDQ. VIX / VOX(AC) indicates the voltage at which differential input / output signals must
cross.
Input / Output Capacitance
Parameter
Input capacitance
-2.5
(A0~A12, BA0~BA1, CKE, CS , RAS , CAS , WE , ODT)
-3
Input capacitance (CLK, CLK )
Symbol
CIN1
CIN2
DQS,
& Data input/output capacitance
-2.5/ 3
CI / O
Input capacitance (DM)
Note: 1. Capacitance delta is 0.25 pF.
2. Capacitance delta is 0.5 pF.
-2.5/ 3
CIN3
Min.
1.0
1.0
1.0
2.5
2.5
Max.
1.75
2.0
2.0
3.5
3.5
Unit Note
pF 1
pF 1
pF 2
pF 2
Elite Semiconductor Memory Technology Inc.
Publication Date : Feb. 2009
Revision : 1.1
8/59
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