M14D2561616A Datasheet, PDF (27/59 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks DDR II SDRAM

ESMT
M14D2561616A
Off-Chip Driver (O CD) Impedance Adjustment
DDR2 SDRAM supports driver calibration feature. Every calibration mode command should be followed by “OCD calibration mode
exit” before any other command being issued. MRS should be set before entering OCD impedance adjustment and ODT (On Die
Termination) should be carefully controlled depending on system environment.
OCD Flow Chart
Start
MRS should be set before entering OCD impedance adjustment and
ODT should be carefully controlled depending on system environment
EMRS(1) : OCD calibration mode exit
EMRS(1) : Driver-1
DQ & DQS High ; DQS Low
EMRS(1) : Driver-0
DQ & DQS Low ; DQS High
ALL OK
Test
Need Calibration
EMRS(1) : OCD calibration mode exit
EMRS(1) :
Enter Adjustable mode
BL=4 code input to all
DQs Inc, Dec, or NOP
EMRS(1) : OCD calibration mode exit
ALL OK
Test
Need Calibration
EMRS(1) : OCD calibration mode exit
EMRS(1) :
Enter Adjustable mode
BL=4 code input to all
DQs Inc, Dec, or NOP
EMRS(1) : OCD calibration mode exit
EMRS(1) : OCD calibration mode exit
End
Elite Semiconductor Memory Technology Inc.
Publication Date : Feb. 2009
Revision : 1.1
27/59