M14D2561616A Datasheet, PDF (50/59 Pages) Elite Semiconductor Memory Technology Inc. – 4M x 16 Bit x 4 Banks DDR II SDRAM

ESMT
M14D2561616A
Read with Auto Precharge to Power-Down Entry
T0
CLK
CLK
Command
T1
T2
READ
CKE
BL = 4
DQS
DQS
DQ
T0
CLK
CLK
Command
T1
T2
READ
CKE
BL = 8
DQS
DQS
DQ
Tx
Tx+1
Tx+2
Tx+3
Tx+4
Tx+5
Tx+6
Tx+7
Tx+8
Tx+9
PRE
AL+BL/2
with tRTP =7.5ns
and tRAS(min.) satisfied
CKE should be kept high until the end of burst operation
AL + CL
DoutA0 DoutA1 DoutA2 DoutA3
Tx
Tx+1
Tx+2
Tx+3
Tx+4
Tx+5
Tx+6
Tx+7
Tx+8
Tx+9
AL+BL/2
with tRTP = 7.5ns
and tRAS(min.) satisfied
PRE
Start internal precharge
CKE should be kept high until the end of burst operation
AL + CL
DoutA0 DoutA1 DoutA2 DoutA3 DoutA4 DoutA5 DoutA6 DoutA7
T0
CLK
CLK
Command
CKE
BL = 4
DQS
DQS
DQ
T0
CLK
CLK
Command
Write to Power-Down Entry
T1
Tm
Tm+1
Tm+2
Tm+3
Tx
Tx+1
Tx+2
WRITE
tWTR
WL
DinA0 DinA1 DinA2 DinA3
T1
Tm
Tm+1
Tm+2
Tm+3
Tm+4
Tm+5
Tx
WRITE
Ty
Tx+1
Ty+1
Ty+2
Tx+2
Tx+3
Ty+3
Tx+4
CKE
BL = 8
DQS
DQS
DQ
WL
DinA0 DinA1 DinA2 DinA3 DinA4 DinA5 DinA6 DinA7
tWTR
Elite Semiconductor Memory Technology Inc.
Publication Date : Feb. 2009
Revision : 1.1
50/59