M12L64322A_07 Datasheet, PDF (30/47 Pages) Elite Semiconductor Memory Technology Inc. – 512K x 32 Bit x 4 Banks Synchronous DRAM

ESMT
M12L64322A
Single Bit Read-Write-Read Cycle(Same Page) @ CAS Latency = 3,Burst Length = 1
CLOCK
CKE
CS
RAS
CAS
ADDR
BA0,BA1
tCH
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
18 19
tCC
*Note1
tCL
tRAS
tRC
HIGH
tSH
tSH
tRCD
tSS
tRP
tSS
tSH
tCCD
tSH
Ra
tSS
*Note2
BS
tSS
Ca
*No te 2, 3
BS
Cb
Cc
*Note2,3
BS
*No te 2, 3
BS
*Note4
BS
Rb
*Note2
BS
A10/AP
Ra
DQ
WE
DQM
*Note3
*Note3
*Note3
*Note4
Rb
tSH
tSAC
Qa
Db
Qc
tSLZ
tOH
tSS
tSH
tSS
tSS
tSH
Row Active
Read
Write
Read
Precharge
Row Active
:Don't Care
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2007
Revision: 2.3
30/47