EN27LN4G08 Datasheet, PDF (43/54 Pages) Eon Silicon Solution Inc. – 4 Gigabit (512M x 8), 3.3 V NAND Flash Memory

EN27LN4G08
Two-Plane Page Read
Two-Plane Page Read is an extension of Page Read, for a single plane with 2,112 byte data registers.
Since the device is equipped with two memory planes, activating the two sets of 2,112 byte data
registers enables a random read of two pages. Two-Plane Page Read is initiated by repeating
command 60h followed by three address cycles twice. In this case, only same page of same block can
be selected from each plane.
After Read Confirm command (30h) the 4,224 bytes of data within the selected two page are transferred
to the cache registers via data registers in less than 25us (t_R). The system controller can detect the
completion of data transfer (t_R) by monitoring the output of R/B# pin.
Once the data is loaded into the cache registers, the data output of first plane can be read out by issuing
command 00h with five address cycles, command 05h with two column address and finally E0h. The
data output of second plane can be read out using the identical command sequences.
This Data Sheet may be revised by subsequent versions
43
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/10/03