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EN27LN4G08 Datasheet, PDF (16/54 Pages) Eon Silicon Solution Inc. – 4 Gigabit (512M x 8), 3.3 V NAND Flash Memory
Block Replacement
EN27LN4G08
Addressing for program operation
Within a block, the pages must be programmed consecutively from the LSB (Least Significant Bit) page
of the block to MSB (Most Significant Bit) pages of the block. Random page address programming is
prohibited. In this case, the definition of LSB page is the LSB among the pages to be programmed.
Therefore, LSB page doesn’t need to be page 0.
Page 63
(64)
Page 63
(64)
:
:
Page 31
(32)
Page 31
(1)
:
:
Page 2
(3)
Page 1
(2)
Page 0
(1)
Page 2
(3)
Page 1
(32)
Page 0
(2)
Data register
Data register
From the LSB page to MSB page
Ex.) Random page program (Prohibition)
DATA IN: Data (1) Data (64)
DATA IN: Data (1) Data (64)
This Data Sheet may be revised by subsequent versions
16
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/10/03