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EN27LN4G08 Datasheet, PDF (10/54 Pages) Eon Silicon Solution Inc. – 4 Gigabit (512M x 8), 3.3 V NAND Flash Memory
EN27LN4G08
Program / Erase Characteristics
(TA = 0 to 70°C or – 40°C to 85°C, VCC=2.7V~3.6V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Average Program Time
tPROG(1)
-
250
750
us
Dummy Busy Time for Cache
Program
tCBSY(2)
-
3
750
us
Number of Partial Program Cycles
in the Same Page
NOP
-
-
4
Cycle
Block Erase Time
tBERS
-
Dummy Busy Time for Two-Plane Page
Program
tDBSY
2
10
ms
0.5
1
us
Note:
1. Typical program time is defined as the time within which more than 50% of the whole pages are
programmed at 3.3V VCC and 25°C temperature.
2. tPROG is the average program time of all pages. Users should be noted that the program time
variation from page to page is possible.
3. Max. time of tCBSY depends on timing between internal program completion and data in.
AC Timing Characteristics for Command / Address / Data Input
Parameter
Symbol
Min.
Max.
Unit
CLE Setup Time
tCLS(1)
12
-
ns
CLE Hold Time
tCLH
5
-
ns
CE# Setup Time
tCS
20
-
ns
CE# Hold Time
tCH
5
-
ns
WE# Pulse Width
ALE Setup Time
tWP
12
tALS(1)
12
-
ns
-
ns
ALE Hold Time
Data Setup Time
tALH
5
tDS(1)
12
-
ns
-
ns
Data Hold Time
tDH
5
-
ns
Write Cycle Time
tWC
25
-
ns
WE# High Hold Time
ALE to Data Loading Time
tWH
tADL(2)
10
70 (2)
-
ns
-
ns
Note:
1. The transition of the corresponding control pins must occur only once while WE# is held low.
2. tADL is the time from the WE# rising edge of final address cycle to the WE# rising edge of first data
cycle.
This Data Sheet may be revised by subsequent versions
10
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc., www.eonssi.com
Rev. A, Issue Date: 2013/10/03