DS87C550 Datasheet, PDF(8/50 Page) Dallas Semiconductor – EPROM High-Speed Micro with A/D and PWM

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DS87C550 Datasheet, PDF (8/50 Pages) Dallas Semiconductor – EPROM High-Speed Micro with A/D and PWM

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DS87C550

instruction used two machine cycles or 24 oscillator cycles. Therefore, they required the same amount of

time. In the DS87C550, the MOVX instruction takes as little as two machine cycles or eight oscillator

cycles, but the âMOV direct, directâ uses three machine cycles or 12 oscillator cycles. While both are

faster than their original counterparts, they now have different execution times. This is because the

DS87C550 usually uses one instruction cycle for each instruction byte. Examine the timing of each

instruction for familiarity with the changes. Note that a machine cycle now requires just 4 clocks, and

provides one ALE pulse per cycle. Many instructions require only one cycle, but some require five. In the

original architecture, all were one or two cycles except for MUL and DIV. Refer to the High Speed Micro

Userâs Guide for details and individual instruction timing.

SPECIAL FUNCTION REGISTERS

Special Function Registers (SFRs) control most special features of the DS87C550. This allows the

DS87C550 to have many new features but use the same instruction set as the 8051. When writing

software to use a new feature, an equate statement defines the SFR to an assembler or compiler. This is

the only change needed to access the new function. The DS87C550 duplicates the SFRs contained in the

standard 80C52. Table 2 shows the register addresses and bit locations. Many are standard 80C52

registers. The High Speed Micro Userâs Guide describes all SFRs in full detail.

SPECIAL FUNCTION REGISTER LOCATION: Table 2

PORT0

DPL

DPH

DPL1

DPH1

DPS

PCON

TCON

TMOD

TL0

TL1

TH0

TH1

CKCON

PORT1

RCON

SCON0

SBUF0

PMR

PORT2

SADDR0

SADDR1

CMPL0

CMPL1

CMPL2

CPTL0

CPTL1

CPTL2

CPTL3

PORT3

ADCON1

BIT7

P0.7

ID1

SMOD_0

TF1

GATE

WD1

P1.7

SM0/FE_0

CD1

P2.7

P3.7

STRT/BSY

BIT6

P0.6

ID0

SMOD0

TR1

C/ T

WD0

P1.6

SM1_0

CD0

P2.6

EAD

P3.6

EOC

BIT5

P0.5

TSL

OFDF

TF0

T2M

P1.5

SM2_0

SWB

P2.5

ES1

P3.5

CONT/SS

BIT4

P0.4

OFDE

TR0

T1M

P1.4

REN_0

CTM

P2.4

ES0

P3.4

ADEX

BIT3

P0.3

BIT2

P0.2

GF1

GF0

IE1

IT1

GATE

C/ T

T0M

P1.3

CKRDY

TB8_0

MD2

P1.2

RGMD

RB8_0

4X/ 2X

P2.3

ALEOFF

P2.2

ET1

EX1

P3.3

WCQ

P3.2

WCM

BIT1

P0.1

STOP

IE0

MD1

P1.1

RGSL

TI_0

DEM1

P2.1

ET0

P3.1

ADON

BIT0

P0.0

SEL

IDLE

IT0

MD0

P1.0

BGS

RI_0

DME0

P2.0

EX0

P3.0

WCIO

ADDRESS

80h

81h

82h

83h

84h

85h

86h

87h

88h

89h

8Ah

8Bh

8Ch

8Dh

8Eh

90h

91h

98h

99h

9Fh

A0h

A1h

A2h

A8h

A9h

AAh

ABh

ACh

ADh

AEh

AFh

B0h

B2h

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