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DS87C550 Datasheet, PDF (26/50 Pages) Dallas Semiconductor – EPROM High-Speed Micro with A/D and PWM
DS87C550
16-BIT MODE
For more precise PWM operations, two 8-bit PWMs may be combined into a single 16-bit PWM
function. By setting SFR bit PWE0 (PWMADR.0) to a 1, a new 16-bit PWM0 function is formed from
the 8-bit PWM functions PWM0 (LSB) and PWM1 (MSB). Similarly, by setting PWE1 (PWMADR.1) to
a 1, a new 16-bit PWM1 function is formed from PWM2 (LSB) and PWM3 (MSB). Since each pair of
PWMs can be independently configured into a 16-bit arrangement, the user has the option of having four
8-bit PWM functions, two 8-bit PWM functions and a 16-bit PWM function, or two 16-bit PWM
functions.
In 16-bit PWM mode, the prescaler operates exactly as it did in 8-bit mode. Its outputs are available to all
four clock generator blocks. However in 16-bit mode, the clock generators for 8-bit PWM1 and PWM3
are not functional. The clock for 16-bit PWM0 function is provided by the clock generator for 8-bit
PWM0 and the clock for 16-bit PWM1 function is provided by the clock generator for 8-bit PWM2. The
SFR bits PW0EN (clock generator enable) and PW0S2:0 (clock select bits) provide the programmable
clock controls for 16-bit PWM channel 0, and bits PW2EN and PW2S2:0 provide the programmable
clock controls for 16-bit PWM channel 1. The clock divisor values for the 16-bit PWM operating
frequency are contained in the PW0FG and PW2FG registers for 16-bit PWM0 and PWM1
(respectively). Note that these registers remain 8-bit values so the clock division remains the same for
16-bit and 8-bit operation.
When in 16-bit mode, the two 8-bit pulse generator timers are concatenated together forming a 16-bit
timer. Therefore the pulse generator section of a 16-bit PWM channel has a repetition rate of the input
clock divided by 65,536. As in 8-bit mode when the counter reaches 0, the output of the 16-bit PWM
channel is set (i.e., logic 1), and when it reaches the pre-loaded match value it is cleared (i.e., logic 0).
GENERAL PURPOSE TIMERS/COUNTERS
The DS87C550 contains three general-purpose timer/ counters. Timers 0 and 1 are standard 8051 16-bit
timer/counters with three modes of operation. Each of these devices can be used as a 13-bit timer/counter,
16-bit timer/counter or 8-bit timer/counter with auto-reload. Timer 0 can also operate as two 8-bit timer
counters. Each timer can also be used as a counter of external pulses on the corresponding T0 or T1 pin.
The mode of operation is controlled by the Timer Mode (TMOD) register. Each timer/counter consists of
a 16-bit register in 2 bytes, which can be found in the SFR map as TL0, TH0, TL1, and TH1. These two
timers are enabled by the Timer Control (TCON) register. A complete description of use and operation of
these timers may be found in the “High-Speed Microcontroller Data Book.”
Timer 2 is a true 16-bit timer/counter with several additional features as compared to timers 1 and 0. With
a 16-bit reload register (RLOADL, RLOADH), it provides up/down auto-reload timer/counters and timer
output clock generation. Timer 2 also supports a capture/compare function. This new feature provides
additional timing control capabilities for real-time applications with less CPU intervention. A more
detailed description of this capture/compare feature is provided below.
TIMER 2
The selection of a timer or counter function is controlled by the C/ T2 (T2CON.1) bit When C/ T2 is set to
1, Timer 2 acts as a counter where it counts 1 to 0 transitions on the T2 pin. When C/ T2 is cleared to a 0,
Timer 2 functions as a timer where it counts the system clock as determined by the T2M bit (CKCON.5)
and the clock divide control bits CD1, CD0 (PMR.7:6) and the 4X/ 2X (PMR.3) bit. A prescaler is used to
further divide the input clock by a programmable ratio. The prescaler value is programmable to divide by
1, 2, 4, and 8 as defined by the T2P1 and T2P0 (T2SEL.1:0) bits. Timer 2 is enabled by setting bit TR2
(T2CON.2) to a 1, and disabled by clearing it to a 0.
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