DS87C550 Datasheet, PDF (30/50 Pages) Dallas Semiconductor – EPROM High-Speed Micro with A/D and PWM

DS87C550
INTERRUPTS
The DS87C550 provides 16 interrupt sources with three priority levels. The Power-fail Interrupt (PFI) has
the highest priority. All interrupts, with the exception of the Power-fail Interrupt, are controlled by a
series combination of individual enable bits and a global interrupt enable EA (IE.7). Setting EA to a 1
allows individual interrupts to be enabled. Clearing EA disables all interrupts regardless of their
individual enable settings.
The three available priority levels are low, high, and highest. The highest priority level is reserved for the
Power-Fail Interrupt only. All other interrupt priority levels have individual priority bits that when set to a
1 establish the particular interrupt as high priority. In addition to the user selectable priorities, each
interrupt also has an inherent or “natural priority”. Given that all interrupt sources maintain the default
low priority, the natural priority determines the priority of simultaneously occurring interrupts. The
available interrupt sources, their flags, their enables their natural priority, and their available priority
selection bits are identified in Table 9.
INTERRUPT SOURCES AND PRIORITIES Table 9
NAME
PFI
DESCRIPTION
Power Fail Interrupt
VECTOR
33h
NATURAL
PRIORITY
0
FLAG
BIT
PFI(WDCON.4)
INT0
External Interrupt 0
03h
1
IEO(TCON.1)
SCON1
TI1 or RI1 from serial
port 1
0Bh
2
RI_1(SCON1.0)
TI_1(SCON1.1)
A/D
A/D Converter
Interrupt
13h
3
EOC(ADCON1.6)
TF0
Timer 0
1Bh
4
TF0(TCON.5)
INT2/CF0
External Interrupt 2 or
Capture 0
23h
5
IE2/CF0(T2IR.0)
CM0F
Compare Match 0
2Bh
6
CM0F(T2IR.4)
INT1
External Interrupt 1
3Bh
7
IE1(TCON.3)
INT3/CF1
External Interrupt 3 or
Capture 1
43h
8
IE3/CF1(T2IR.1)
CM1F
Compare Match 1
4Bh
9
CM1F(T2IR.5)
TF1
Timer 1
53h
10
TF1(TCON.7)
INT4/CF2
External Interrupt 4 or
Capture 2
5Bh
11
IE4/CF2(T2IR.2)
CM2F
Compare Match 2
63h
12
CM2F(T2IR.6)
SCON0
TI0 or RI0 from serial
port 0
6Bh
13
RI_0(SCON0.0)
TI_0(SCON0.1)
INT5/CF3
External Interrupt 5 or
Capture 3
73h
14
IE5/CF3(T2IR.3)
TF2
Timer 2
7Bh
15
TF2(TCON.7)
TF2B(T2SEL.4)
ENABLE
BIT
EPFI(WDCON.5)
EX0(IE.0)
PRIORITY
CONTROL BIT
N/A
PX0(IP.0)
ES1(IE.5)
PS1(IP.5)
EAD(IE.6)
ET0(IE.1)
EX2/EC0(EIE.0)
ECM0(EIE.4)
EX1(IE.2)
EX3/EC1(EIE.1)
ECM1(EIE.5)
ET1(IE.3)
EX4/EC2(EIE.2)
ECM2(EIE.6)
ES0(IE.4)
PAD(IP.6)
PT0(IP.1)
PX2/PC0(EIP.0)
PCM0(EIP.4)
PX1(IP.2)
PX3/PC1(EIP.1)
PCM1(EIP.5)
PT1(IP.3)
PX4/PC2(EIP.2)
PCM2(EIP.6)
PS0(IP.4)
EX5/EC3(EIE.3) PX5/PC3(EIP.3)
ET2(EIE.7)
PT2(EIP.7)
EPROM PROGRAMMING
The DS87C550 follows 8-kbyte EPROM standards for the 8051 family. It is available in a UV erasable,
ceramic windowed package and in plastic packages for one-time user-programmable versions. The part
has unique signature information so programmers can support its specific EPROM options.
PROGRAMMING PROCEDURE
The DS87C550 should run from a clock speed between 4 and 6 MHz when programmed. The
programming fixture should apply address information for each byte to the address lines and the data
value to the data lines. The control signals must be manipulated as shown in Table 10. The diagram in
Figure 5 shows the expected electrical connection for programming. Note that the programmer must
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