DS87C550 Datasheet, PDF (23/50 Pages) Dallas Semiconductor – EPROM High-Speed Micro with A/D and PWM

DS87C550
A/D OUTPUT
There are two SFR locations that contain the result of the A/D conversion process. They are ADMSB
(most significant byte) and ADLSB (least significant byte). The ADLSB byte always contains the 8 least
significant bits of the 10-bit result. The ADMSB can be configured in two different ways through the use
of the SFR bit OUTCF (ADCON2.7). If OUTCF is a 0, then ADMSB contains the 8 most significant bits
of the 10-bit conversion (i.e., bits 9-2). If OUTCF is a 1, then ADMSB contains A/D output bits 9-8 (right
justified). The upper 6 bits of the register are set to 0 in this case.
The value stored in the output registers is given by the following equation:
1024 x ((Vin-Avref-)/(Avref+ - Avref-))
This equation shows that the A/D conversion result is a 10-bit binary number that represents what fraction
of the available reference voltage the input signal is. As you can see with a reference voltage of 2.5 volts,
the output has a resolution of 2.44 millivolts. This shows that the reference voltage must be very well
regulated to ensure satisfactory performance. It should be noted that the output of the A/D conversion
process will be “0000000000” for voltages from Avref- to (Avref- +1/2 LSB). In addition, “1111111111”
will be output for voltages from (Avref+ - 3/2 LSB) to Avref+.
The DS87C550 offers a unique feature that allows the result of an A/D conversion to be compared with
two user-defined values stored in the WINHI and WINLO registers. The results of this comparison will
set or clear the WCM (ADCON 1.2) bit, and this bit can be used as a qualifier to the A/D interrupt. This
comparison is built into hardware so that this feature is performed without any burden on the software,
and A/D results that are not of particular interest to the application can be ignored. Special function
registers WINHI and WINLO are loaded by application software with 8-bit numbers that are compared
with the 8 MSBs of the A/D result. These user-defined numbers form a range of values, and the A/D
result is evaluated to be inside or outside of this range. When WCIO (ADCON.1) is 0, then WCM is set if
the A/D result is found to be inside the range. Otherwise WCM is cleared. When WCIO is a 1, then
WCM is set if the A/D result is found to be outside the range. Otherwise WCM is cleared. The state of the
WCM bit is expressed by the following equation:
WCM = WCIO ⊕ (WINHI ≤ADMSB) ⊕ (WINLO ≤ADMSB)
This equation precisely identifies the relationship between the window registers (WINHI and WINLO),
the MSB of the A/D conversion (ADMSB), and the WCIO and WCM bits. However by observation, it is
not particularly intuitive as to how this interaction works in a practical sense. If the user makes the
assumption that the value stored in WINHI is greater that the value stored in WINLO (this is normally but
not necessarily the case), then this equation can be simplified to the following two cases:
For WCIO = 0: WCM = (WINHI > ADMSB) AND (ADMSB ≥ WINLO)
For WCIO = 1: WCM = (WINHI ≤ADMSB) OR (ADMSB < WINLO)
It is clear that these two equations now express the cases where the A/D result is inside the comparison
window (WCIO = 0) and outside the comparison window (WCIO = 1). It is important to note the ≤and
≥ symbols and account for the specific values that are included in the comparison.
There is another SFR bit, WCQ, that further defines the action taken when the WCM is set. If WCQ is 0,
then an A/D Interrupt will occur (if enabled) regardless of the comparison results. When WCQ is set to a
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