DS87C530_1 Datasheet, PDF (7/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
INSTRUCTION SET SUMMARY
All instructions perform the same functions as their 8051 counterparts. Their effect on bits, flags, and
other status functions is identical. However, the timing of each instruction is different. This applies both
in absolute and relative number of clocks.
For absolute timing of real-time events, the timing of software loops can be calculated using a table in the
High-Speed Microcontroller User’s Guide. However, counter/timers default to run at the older 12 clocks
per increment. In this way, timer-based events occur at the standard intervals with software executing at
higher speed. Timers optionally can run at 4 clocks per increment to take advantage of faster processor
operation.
The relative time of two instructions might be different in the new architecture than it was previously. For
example, in the original architecture, the “MOVX A, @DPTR” instruction and the “MOV direct, direct”
instruction used two machine cycles or 24 oscillator cycles. Therefore, they required the same amount of
time. In the DS87C530/DS83C530, the MOVX instruction takes as little as two machine cycles or eight
oscillator cycles but the “MOV direct, direct” uses three machine cycles or 12 oscillator cycles. While
both are faster than their original counterparts, they now have different execution times. This is because
the DS87C530/DS83C530 usually uses one instruction cycle for each instruction byte. The user
concerned with precise program timing should examine the timing of each instruction for familiarity with
the changes. Note that a machine cycle now requires just 4 clocks, and provides one ALE pulse per cycle.
Many instructions require only one cycle, but some require five. In the original architecture, all were one
or two cycles except for MUL and DIV. Refer to the High-Speed Microcontroller User’s Guide for details
and individual instruction timing.
SPECIAL FUNCTION REGISTERS
Special Function Registers (SFRs) control most special features of the DS87C530/DS83C530. This
allows the device to incorporate new features but remain instruction set compatible with the 8051.
EQUATE statements can be used to define the new SFR to an assembler or compiler. All SFRs contained
in the standard 80C52 are duplicated in this device. Table 2 shows the register addresses and bit locations.
The High-Speed microcontroller User’s Guide describes all SFRs.
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