DS87C530_1 Datasheet, PDF (4/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
PLCC
38
39
50
49
48
47
46
45
44
43
3-10
3
4
5
6
7
8
9
10
TQFP
31
32
43
42
41
40
39
38
37
36
48-52,
1-3
48
49
50
51
52
1
2
3
SIGNAL
NAME
PSEN
ALE
P0.0 (AD0)
P0.1 (AD1)
P0.2 (AD2)
P0.3 (AD3)
P0.4 (AD4)
P0.5 (AD5)
P0.6 (AD6)
P0.7 (AD7)
P1.0 - P1.7
DESCRIPTION
PSEN - Output. The Program Store Enable output. This signal is a
chip enable for optional external ROM memory. PSEN will
provide an active low pulse and is driven high when external
ROM is not being accessed.
ALE - Output. The Address Latch Enable output latches the
external address LSB from the multiplexed address/data bus on
Port 0. This signal is commonly connected to the latch enable of
an external 373 family transparent latch. ALE has a pulse width of
1.5 XTAL1 cycles and a period of four XTAL1 cycles. ALE is
forced high when the device is in a Reset condition. ALE can be
disabled and forced high by writing ALEOFF=1 (PMR.2). ALE
operates independently of ALEOFF during external memory
accesses.
Port 0 (AD0-7) - I/O. Port 0 is an open-drain, 8-bit bi-directional
I/O port. As an alternate function Port 0 can function as the
multiplexed address/data bus to access off-chip memory. During
the time when ALE is high, the LSB of a memory address is
presented. When ALE falls to a logic 0, the port transitions to a bi-
directional data bus. This bus is used to read external ROM and
read/ write external RAM memory or peripherals. When used as a
memory bus, the port provides active high drivers. The reset
condition of Port 0 is tri-state. Pullup resistors are required when
using Port 0 as an I/O port.
Port 1 - I/O. Port 1 functions as both an 8-bit bi-directional I/O
port and an alternate functional interface for Timer 2 I/O, new
External Interrupts, and new Serial Port 1. The reset condition of
Port 1 is with all bits at a logic 1. In this state, a weak pullup holds
the port high. This condition also serves as an input mode, since
any external circuit that writes to the port will overcome the weak
pullup. When software writes a 0 to any port pin, the device will
activate a strong pulldown that remains on until either a 1 is
written or a reset occurs. Writing a 1 after the port has been at 0
will cause a strong transition driver to turn on, followed by a
weaker sustaining pullup. Once the momentary strong driver turns
off, the port again becomes the output high (and input) state. The
alternate modes of Port 1 are outlined as follows.
Port Alternate
P1.0 T2
P1.1 T2EX
P1.2 RXD1
P1.3 TXD1
P1.4 INT2
P1.5 INT3
P1.6 INT4
Function
External I/O for Timer/Counter 2
Timer/Counter 2 Capture/Reload Trigger
Serial Port 1 Input
Serial Port 1 Output
External Interrupt 2 (Positive Edge Detect)
External Interrupt 3 (Negative Edge Detect)
External Interrupt 4 (Positive Edge Detect)
P1.7 INT5
External Interrupt 5 (Negative Edge Detect)
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