DS87C530_1 Datasheet, PDF (13/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
method of expanding on-chip memory. Off-chip ROM access also occurs if the EA pin is a logic 0. EA
overrides all bit settings. The PSEN signal will go active (low) to serve as a chip enable or output enable
when Ports 0 and 2 fetch from external ROM.
ROM MEMORY MAP Figure 4
DATA MEMORY ACCESS
Unlike many 8051 derivatives, the DS87C530/DS83C530 contains on-chip data memory. It also contains
the standard 256 bytes of RAM accessed by direct instructions. These areas are separate. The MOVX
instruction accesses the on-chip data memory. Although physically on-chip, software treats this area as
though it was located off-chip. The 1 kB of SRAM is between address 0000h and 03FFh.
Access to the on-chip data RAM is optional under software control. When enabled by software, the data
SRAM is between 0000h and 03FFh. Any MOVX instruction that uses this area will go to the on-chip
RAM while enabled. MOVX addresses greater than 03FFh automatically go to external memory through
Ports 0 and 2.
When disabled, the 1 kB memory area is transparent to the system memory map. Any MOVX directed to
the space between 0000h and FFFFh goes to the expanded bus on Ports 0 and 2. This also is the default
condition. This default allows the DS87C530/DS83C530 to drop into an existing system that uses these
addresses for other hardware and still have full compatibility.
The on-chip data area is software selectable using 2 bits in the Power Management Register at location
C4h. This selection is dynamically programmable. Thus access to the on-chip area becomes transparent
to reach off-chip devices at the same addresses. The control bits are DME1 (PMR.1) and DME0 (PMR.0).
They have the following operation:
DATA MEMORY ACCESS CONTROL Table 3
DME1 DME0 DATA MEMORY ADDRESS
MEMORY FUNCTION
0
0 0000h - FFFFh
External Data Memory * Default condition
0
1 0000h - 03FFh
0400h - FFFFh
Internal SRAM Data Memory
External Data Memory
1
0 Reserved
Reserved
1
1 0000h - 03FFh
0400h - FFFBh
FFFCh
FFFDh - FFFh
Internal SRAM Data Memory
Reserved - no external access
Read access to the status of lock bits
Reserved - no external access
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