DS87C530_1 Datasheet, PDF (12/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
PROGRAM MEMORY ACCESS
On-chip ROM begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding the
maximum address of on-chip ROM will cause the DS87C530/DS83C530 to access off-chip memory.
However, the maximum on-chip decoded address is selectable by software using the ROMSIZE feature.
Software can cause the microcontroller to behave like a device with less on-chip memory. This is
beneficial when overlapping external memory, such as Flash, is used.
The maximum memory size is dynamically variable. Thus a portion of memory can be removed from the
memory map to access off-chip memory, then restored to access on-chip memory. In fact, all of the on-
chip memory can be removed from the memory map allowing the full 64 kB memory space to be
addressed from off-chip memory. ROM addresses that are larger than the selected maximum are
automatically fetched from outside the part via Ports 0 and 2. A depiction of the ROM memory map is
shown in Figure 4.
The ROMSIZE register is used to select the maximum on-chip decoded address for ROM. Bits RMS2,
RMS1, RMS0 have the following effect:
RMS2
0
0
0
0
1
1
1
1
RMS1
0
0
1
1
0
0
1
1
RMS0
0
1
0
1
0
1
0
1
Maximum on-chip ROM Address
0 kB
1 kB
2 kB
4 kB
8 kB
16 kB (default)
Invalid - reserved
Invalid - reserved
The reset default condition is a maximum on-chip ROM address of 16 kB. Thus no action is required if
this feature is not used. When accessing external program memory, the first 16 kB would be inaccessible.
To select a smaller effective ROM size, software must alter bits RMS2-RMS0. Altering these bits
requires a Timed Access procedure as explained below.
Care should be taken so that changing the ROMSIZE register does not corrupt program execution. For
example, assume that a device is executing instructions from internal program memory near the 12 kB
boundary (~3000h) and that the ROMSIZE register is currently configured for a 16 kB internal program
space. If software reconfigures the ROMSIZE register to 4 kB (0000h-0FFFh) in the current state, the
device will immediately jump to external program execution because program code from 4kB to 16kB
(1000h-3FFFh) is no longer located on-chip. This could result in code misalignment and execution of an
invalid instruction. The recommended method is to modify the ROMSIZE register from a location in
memory that will be internal (or external) both before and after the operation. In the above example, the
instruction which modifies the ROMSIZE register should be located below the 4 kB (1000h) boundary,
so that it will be unaffected by the memory modification. The same precaution should be applied if the
internal program memory size is modified while executing from external program memory.
Off-chip memory is accessed using the multiplexed address/data bus on P0 and the MSB address on P2.
While serving as a memory bus, these pins are not I/O ports. This convention follows the standard 8051
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