DS87C530_1 Datasheet, PDF (25/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
user can enable the Watchdog Interrupt using EWDI (EIE.4). The Special Function Register map is
shown above.
INTERRUPTS
The DS87C530/DS83C530 provides 14 interrupt sources with three priority levels. The Power-Fail
Interrupt (PFI) has the highest priority. Software can assign high or low priority to other sources. All
interrupts that are new to the 8051 family, except for the PFI, have a lower natural priority than the
originals.
INTERRUPT SOURCES AND PRIORITIES Table 9
NAME
DESCRIPTION
VECTOR
NATURAL
PRIORITY
PFI
Power Fail Interrupt
33h
1
INT0
External Interrupt 0
03h
2
TF0
Timer 0
0Bh
3
INT1
External Interrupt 1
13h
4
TF1
Timer 1
1Bh
5
SCON0 TI0 or RI0 from serial port 0
23h
6
TF2
Timer 2
2Bh
7
SCON1 TI1 or RI1 from serial port 1
3Bh
8
INT2
External Interrupt 2
43h
9
INT3
External Interrupt 3
4Bh
10
INT4
External Interrupt 4
53h
11
INT5
External Interrupt 5
5Bh
12
WDTI
Watchdog Time-Out Interrupt
63h
13
RTCI
Real Time Clock Interrupt
6Bh
14
8051/DALLAS
DALLAS
8051
8051
8051
8051
8051
8051
DALLAS
DALLAS
DALLAS
DALLAS
DALLAS
DALLAS
DALLAS
TIMED ACCESS PROTECTION
It is useful to protect certain SFR bits from an accidental write operation. The Timed Access procedure
stops an errant CPU from accidentally changing these bits. It requires that the following instructions
precede a write of a protected bit.
MOV
MOV
0C7h, #0AAh
0C7h, #55h
Writing an AAh then a 55h to the Timed Access register (location C7h) opens a three-cycle window for
write access. The window allows software to modify a protected bit(s). If these instructions do not
immediately precede the write operation, then the write will not take effect. The protected bits are:
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