DS87C530_1 Datasheet, PDF (31/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
NOTES FOR DC ELECTRICAL CHARACTERISTICS:
All parameters apply to both commercial and industrial temperature operation unless otherwise noted.
1. All voltages are referenced to ground.
2. Active current measured with 33 MHz clock source on XTAL1, V_CC=RST=5.5V, other pins
disconnected.
3. Idle mode current measured with 33 MHz clock source on XTAL1, V_CC=5.5V, RST at ground, other
pins disconnected.
4. Stop mode current measured with XTAL1 and RST grounded, V_CC=5.5V, all other pins disconnected.
This value is not guaranteed. Users that are sensitive to this specification should contact Dallas
Semiconductor for more information.
5. When addressing external memory.
6. RST=V_CC. This condition mimics operation of pins in I/O mode. Port 0 is tristated in reset and when
at a logic high state during I/O mode.
7. During a 0 to 1 transition, a one-shot drives the ports hard for two clock cycles. This measurement
reflects port in transition mode.
8. Ports 1, 2, and 3 source transition current when being pulled down externally. It reaches its maximum
at approximately 2V.
9. 0.45<V_IN<V_CC. Not a high impedance input. This port is a weak address holding latch in Bus Mode.
Peak current occurs near the input transition point of the latch, approximately 2V.
10. 0.45<V_IN<V_CC. RST=V_CC. This condition mimics operation of pins in I/O mode.
11. V_CC=0V, V_BAT=3.3V. 32.768 kHz crystal with 12.5 pF load capacitance between RTCX1 and RTCX2
pins. RTCE bit set to 1. This value may be as high as 1 µA over industrial temperature range.
12. This is the current required from an external circuit to hold a logic low level on an I/O pin while the
corresponding port latch bit is set to 1. This is only the current required to hold the low level;
transitions from 1 to 0 on an I/O pin will also have to overcome the transition current.
TYPICAL I_CC VERSUS FREQUENCY Figure 6
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