DS87C530_1 Datasheet, PDF (5/44 Pages) Dallas Semiconductor – EPROM/ROM Micro with Real Time Clock

DS87C530/DS83C530
PLCC
30
31
32
33
34
35
36
37
15-22
TQFP
23
24
25
26
27
28
29
30
8-15
SIGNAL
NAME
P2.0 (AD8)
P2.1 (AD9)
P2.2 (AD10)
P2.3 (AD11)
P2.4 (AD12)
P2.5 (AD13)
P2.6 (AD14)
P2.7 (AD15)
P3.0 - P3.7
DESCRIPTION
Port 2 (A8-15) - I/O. Port 2 is a bi-directional I/O port. The reset
condition of Port 2 is logic high. In this state, a weak pullup holds
the port high. This condition also serves as an input mode, since
any external circuit that writes to the port will overcome the weak
pullup. When software writes a 0 to any port pin, the device will
activate a strong pulldown that remains on until either a 1 is
written or a reset occurs. Writing a 1 after the port has been at 0
will cause a strong transition driver to turn on, followed by a
weaker sustaining pullup. Once the momentary strong driver turns
off, the port again becomes both the output high and input state.
As an alternate function Port 2 can function as MSB of the
external address bus. This bus can be used to read external ROM
and read/write external RAM memory or peripherals.
Port 3 - I/O. Port 3 functions as both an 8-bit bi-directional I/O
port and an alternate functional interface for external interrupts,
Serial Port 0, Timer 0 and 1 Inputs, and RD and WR strobes. The
reset condition of Port 3 is with all bits at a logic 1. In this state, a
weak pullup holds the port high. This condition also serves as an
input mode, since any external circuit that writes to the port will
overcome the weak pullup. When software writes a 0 to any port
pin, the device will activate a strong pulldown that remains on
until either a 1 is written or a reset occurs. Writing a 1 after the
port has been at 0 will cause a strong transition driver to turn on,
followed by a weaker sustaining pullup. Once the momentary
strong driver turns off, the port again becomes both the output
high and input state. The alternate modes of Port 3 are outlined
below.
15
8
16
9
17
10
18
11
19
12
20
13
21
14
22
15
42
35
51
44
EA
V_BAT
Port Alternate
P3.0 RXD0
P3.1 TXD0
Function
Serial Port 0 Input
Serial Port 0 Output
P3.2 INT0
P3.3 INT1
P3.4 T0
P3.5 T1
External Interrupt 0
External Interrupt 1
Timer 0 External Input
Timer 1 External Input
P3.6 WR
External Data Memory Write Strobe
P3.7 RD
External Data Memory Read Strobe
EA - Input. Connect to ground to use an external ROM. Internal
RAM is still accessible as determined by register settings. Connect
to V_CC to use internal ROM.
V_BAT - Input. Connect to the power source that maintains SRAM
and RTC when V_CC < V_BAT. May be connected to a 3V lithium
battery or a super-cap. Connect to GND if battery will not be used
with device.
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