LUPA-4000 Datasheet, PDF (34/49 Pages) Cypress Semiconductor – 4M Pixel CMOS Image Sensor

LUPA-4000
Data Sheet
4.2.3 Precharging of the buses
This timing mode is exactly the same as the mode without sample and hold, except
that the prebus1 and prebus2 signals are activated. It should be noticed that the
precharging of the buses can be combined with all of the timing modes discussed
above. The idea is to have a short pulse of about 5ns to precharge the output buses to
a well-known level. This mode makes the ghosting of bad columns impossible.
In this mode, Nsf_load must be made much larger (at least 1Mohms).
Figure 20: X- and Y-addressing with precharging of the buses
Table 14: Read-out timing specifications with precharching of the buses
Symbol Name
Value
a
Sync_Y
>20ns
b
Sync_Y-Clock_Y
>0ns
c
Clock_Y-Sync_Y
>0ns
d
NoRowSel
>50ns
e
Pre_col
>50ns
200ns (or cst
f
Sh_col
high,
depending on
timing mode)
g
Voltage averaging
>20ns
h
Sync_X-Clock_X
>0ns
i
Prebus pulse
As short as
possible
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134
408-943-2600
Contact: [e-mail] Document #: 38-05712 Rev.**(Revision 1.2 )
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