LUPA-4000 Datasheet, PDF (33/49 Pages) Cypress Semiconductor – 4M Pixel CMOS Image Sensor

LUPA-4000
Data Sheet
4.2.2.a Standard timing (200ns)
Figure 18: Standard timing for the R.O.T. Only pre_col and Norowsel control signals are required.
In this case the control signals Norowsel and pre_col are made active for about 20nsec
from the moment the next line is selected. The time these pulses have to be active is
related with the biasing resistance Pre_load. The lower this resistance, the shorter the
pulse duration of Norowsel and pre_col may be. After these pulses are given, one has
to wait for at least 180nsec before the first pixels can be sampled. For this mode
Sh_col must be made active all the time.
4.2.2.b Back-up timing (ROT =100-200 ns)
A straightforward way of reducing the R.O.T is by using a sample and hold function.
By means of Sh_col the analog data is tracked during the first 100nsec during the
selection of a new set of lines. After 100nsec, the analog data is stored. The ROT is
in this case reduced to 100nsec, but as the internal data was not stable yet dynamic
range is lost because not the complete analog levels are reached yet after 100ns.
Figure 18 shows this principle. Sh_col is now a pulse of 100ns-200ns starting at the
same moment as pre_col and Norowsel. The duration of Sh_col is equal to the ROT.
The shorter this time the shorter the ROT will be however this lowers also the
dynamic range.
In case “voltage averaging” is required, the sensor must work in this mode with
Sh_col signal and a “voltage averaging” signal must be generated after Sh_col drops
and before the readout starts (see figure 15).
Figure 19: Reduced standard ROT by means of Sh_col signal. pre_col (short pulse) , Norowsel (short
pulse) and Sh_col (large pulse).
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