STC3500 Datasheet, PDF (35/48 Pages) Connor-Winfield Corporation – INTEGRATED - STRATUM 3 TIMING SOURCE

Application Notes continued
Figure 11 shows the basic EEPROM access architecture:
EEPROM Access Architecture
Figure 11
Control
EE_Page_Num
Register
EE_Wrt_Mode
EE_Cmd
Registers
Read/Write ^{Address/Control}
Control
Data
32 Byte
FIFO
EEPROM
32 Bytes Page 0
32 Bytes Page 1
...
Data
EE_FIFO_Port
Register
STC3500
32 Bytes Page 231
Data in the EEPROM is organized as 232 pages of 32 bytes each. A 32 byte FIFO provides the data read/write
buffering path for EEPROM accesses, and page numbers are provided by the EE_Page_Num register. For writes, the
application loads the page number and 32 bytes of data into the FIFO. A write command then initiates the write
sequence, which is completed automatically by the device. For a read, the application writes the page number, followed
by a read command. The device reads the data into the FIFO, and the application retrieves the data with successive
reads of the EE_FIFO_Port register.
Specifically, the sequence of operations to perform a write are as follows:
1) Enable writing by setting the write enable bit (write 0x01 to the EE_Wrt_Mode register)
2) Poll the Ready bit (bit 7 of the EE_Cmd register, ready = 1) until ready
3) Write the page number (0 - 231, 0x00 - 0xe7) to the EE_Page_Num register
4) Reset the FIFO by clearing bits 0 and 1 in the EE_Cmd register (write 0x00 to the EE_Cmd register)
5) Perform 32 successive writes to the EE_FIFO_Port register with the desired data for that page number
6) Issue a write command by setting the write bit (write 0x01 to the EE_Cmd register)
7) Poll the Ready bit (bit 7 of the EE_Cmd register, ready = 1) until ready
8) Disable writing by clearing the write enable bit (write 0x00 to the EE_Wrt_Mode register)
9) After a power-up reset, if the EEPROM loaded correctly, the Chksum bit in register 33 should read 1.
This sequence is repeated for each page of data desired to be written. Writing of any particular byte of data requires
writing the full page. For multiple page writes, the write enable/disable operation may encapsulate the entire write
sequence, i.e. it does not need to be repeated per page.
Read operations are performed as follows:
1) Poll the Ready bit (bit 7 of the EE_Cmd register, ready = 1) until ready
2) Write the page number (0 - 231, 0x00 - 0xe7) to the EE_Page_Num register
3) Set the read bit (write 0x02 to the EE_Cmd register)
4) Poll the Ready bit (bit 7 of the EE_Cmd register, ready = 1) until ready
5) Do 32 successive reads of the EE_FIFO_Port register to retrieve the data
This sequence is repeated for each page of data desired to be read. Reading of any particular byte of data requires reading
the full page.
Aborted read or write sequences which do not complete the full 32 read or write cycles for a given page are
automatically cleared by the device at the beginning of the next read or write operation.
Preliminary Data Sheet: TM060 Page 35 of 48 Rev: P06 Date: 11/22/04
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice