STC3500 Datasheet, PDF (20/48 Pages) Connor-Winfield Corporation – INTEGRATED - STRATUM 3 TIMING SOURCE

Register Descriptions and Operation continued
Ref_Pullin_Sts, 0x09 (R)
Bit 7
Bit 6
ref8 sts
1: in range
0: out range
ref7 sts
1: in range
0: out range
Bit 5
ref6 sts
1: in range
0: out range
Bit 4
ref5 sts
1: in range
0: out range
Bit 3
ref4 sts
1: in range
0: out range
Bit 2
ref3 sts
1: in range
0: out range
Bit 1
ref2 sts
1: in range
0: out range
Bit 0
ref1 sts
1: in range
0: out range
Each bit indicates if the reference is within the frequency range specified by the value in the Max_Pullin_Range register.
Ref_Qualified, 0x0a (R)
Bit 7
Bit 6
ref8 qual:
1: avail.
0: not avail.
ref7 qual:
1: avail.
0: not avail.
Bit 5
ref6 qual:
1: avail.
0: not avail.
Bit 4
ref5 qual:
1: avail.
0: not avail.
Bit 3
ref4 qual:
1: avail.
0: not avail.
Bit 2
ref3 qual:
1: avail.
0: not avail.
Bit 1
ref2 qual:
1: avail.
0: not avail.
Bit 0
ref1 qual:
1: avail.
0: not avail.
This register contains the “anded” condition of the Ref_Activity and Ref_Pullin_Sts registers for each of the Ref1-8 inputs, quali-
fied for 10 seconds. When a reference signal has been present for > 10 seconds and is within the pull-in range, it’s bit is set.
Ref_Mask, 0x0b (R/W)
Bit 7
Bit 6
ref8 mask:
1: avail.
0: not avail.
Default: 0
ref7 mask:
1: avail.
0: not avail.
Default: 0
Bit 5
ref6 mask:
1: avail.
0: not avail.
Default: 0
Bit 4
ref5 mask:
1: avail.
0: not avail.
Default: 0
Bit 3
ref4 mask:
1: avail.
0: not avail.
Default: 0
Bit 2
ref3 mask:
1: avail.
0: not avail.
Default: 0
Bit 1
ref2 mask:
1: avail.
0: not avail.
Default: 0
Bit 0
ref1 mask:
1: avail.
0: not avail.
Default: 0
Individual references may be marked as “use” or “no use” for selection in the automatic reference selection mode (bit 1 = 0 in the
Ctl_Mode register). The reset default value is 0, “no use”. In manual reference selection, either hardware or register controlled, the
reference masks have no effect, but do remain valid and are applied upon a transition to automatic mode.
Ref_Available, 0x0c (R)
Bit 7
Bit 6
ref8 avail:
1: avail.
0: not avail.
ref7 avail:
1: avail.
0: not avail.
Bit 5
ref6 avail:
1: avail.
0: not avail.
Bit 4
ref5 avail:
1: avail.
0: not avail.
Bit 3
ref4 avail:
1: avail.
0: not avail.
Bit 2
ref3 avail:
1: avail.
0: not avail.
This register contains the “anded” condition of the Ref_Qualified and Ref_Mask registers.
Bit 1
ref2 avail:
1: avail.
0: not avail.
Bit 0
ref1 avail:
1: avail.
0: not
Ref_Rev_Delay, 0x0d (R/W)
Bit 7 ~ Bit 0
Reference reversion delay time, 0 - 255 minutes. default = 0000 0101, 5 minutes
In automatic reference selection mode, when a reference fails and later returns, it must be available for the time specified in the
Ref_Rev_Delay register before it can be switched back to as the active reference (if the new reference was marked as “revertive”).
See Figure 7.
Preliminary Data Sheet: TM060 Page 20 of 48 Rev: P06 Date: 11/22/04
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice