STC3500 Datasheet, PDF (34/48 Pages) Connor-Winfield Corporation – INTEGRATED - STRATUM 3 TIMING SOURCE

Application Notes continued
Configuration Data – Following any device reset, either via power-up or operation of the Reset pin, the device needs
to be loaded with its DPLL configuration data. This data may come from either an external EEPROM, or the bus
interface. The Dmode pin selects the source for configuration data, 0 = from the bus interface, 1 = from the EEPROM. If
the source is the EEPROM, devices pre-loaded with the data are availbale from Connor-Winfield (See External
Component Selection section). Following a reset, the device automatically pumps the the data from the EEPROM.
If the data is to be application provided through the bus interface, the data is available from Connor-Winfield as a file
and is loaded per the following procedure in Table 9:
Configuration Data Registers
Table 9:
0x30
Cfgdata
0x31
Cfgctr_Lo
0x32
Cfgctr_Hi
0x33
Chksum
Table 9 shows the registers associated with the configuration data and pumping process. The configuration file size is
7424 bytes. Following a reset, the pumping process consists of simply writing the 7424 bytes to the Cfgdata register.
Each write increments the Cfgctr_Lo/Hi counter registers, which are initialized to 0x00 after reset. Completion of pump
coincides with the counter registers reaching the value of Cfgctr_Lo/Hi = 0x1d/ 0x00, corresponding to 7424.
The last two bytes of the configuration data contain the checksum (CRC-16), which is compared to a computed
checksum in the device. The Chksum register indicates a correct or incorrect checksum in the bit 0 position. Bit 0 = 0
after reset, and is valid after the 7424th write to the Cfgdata register, and is set to 1 if the checksum is correct, 0 if it is
incorrect. Further writes beyond 7424 will not affect the device.
A typical pump sequence after reset, for example, would consist of checking the Cfgctr_Lo/Hi and Chksum registers
for a value of 0x00, followed by 7424 consecutive writes to the Cfgdata register. Then, successful completion of the
pump is checked by verifying the values in the Cfgctr_Lo/Hi registers = 0x1d/0x00, and Chksum = 0x01. Incrementing
Cfgctr_Lo/Hi values can optionally be checked while writing.
If Dmode = 1 and the configuration data is pumped automatically from the EEPROM, the operation of the configuration
data registers is still valid. Pump completion and checksum correctness may be verified by reading the Cfgctr_Lo/Hi
and Chksum registers. Writes to the Cfgdata register will have no effect on the device when Dmode = 1. In any case,
writes to the Cfgdata register will have no effect on the device after configuration data pump is complete.
Reading and Writing EEPROM Data – If the optional external EEPROM is provided, it may be read or written to via
the bus interface. Access is provided via the following registers in Table 10 (Also see Register Descriptions and
Operation section):
EEPROM Access Registers
Table 10:
0x36
EE_Wrt_Mode
0x37
EE_Cmd
0x38
EE_Page_Num
0x39
EE_FIFO_Port
Preliminary Data Sheet: TM060 Page 34 of 48 Rev: P06 Date: 11/22/04
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice