DB929B Datasheet, PDF (6/51 Pages) CML Microcircuits – Full Data Packet Framing

4-Level FSK Modem Data Pump
1. Block Diagram
Page 6 of 50
MX929B PRELIMINARY INFORMATION
IRQ
D0
D1
D2
D3
D4
D5
D6
D7
WR
RD
CS
A0
A1
V_DD
V_DD
V_BIAS
DATA
BUS
BUFFERS
ADDRESS
AND
R/W
DECODE
STATUS
REGISTER
DATA
QUALITY
REGISTER
8
COMMAND
REGISTER
MODE
REGISTER
CONTROL
REGISTER
DATA
BUFFER
FEC
ENCODER/
DECODER
CRC
GENERATOR/
CHECKER
INTERLEAVE/
DE-INTERLEAVE
FRAME
SYNC DETECT
V_SS
RXAMPOUT
RXIN
XTAL
Tx Symbols
Rx Input Amp
V_BIAS
Tx
Rx
RRC
LOW PASS
FILTER
CLOCK
OSCILLATOR
AND
DIVIDERS
V_BIAS
Rx Symbols
Rx LEVEL/CLOCK
Rx ^EXTRACTION
Tx
RxEye
Rx
Tx
Tx Output Buffer
XTAL /
CLOCK
Figure 1: Block Diagram
DOC1
DOC2
TXOUT
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