DB929B Datasheet, PDF (39/51 Pages) CML Microcircuits – Full Data Packet Framing

4-Level FSK Modem Data Pump
Page 39 of 50
MX929B PRELIMINARY INFORMATION
5.3 Clock Extraction and Level Measurement Systems
5.3.1 Supported Types of Systems
The MX929B is intended for use in systems where:
1. The Symbol Sync pattern is transmitted immediately on start-up of the transmitter, before the first Frame
Sync pattern (see Figure 23).
2. A Base Station may remain powered up indefinitely, transmitting concatenated Frames with or without
intervening Symbol Sync patterns (each Frame starting with the Frame Sync pattern and symbol timing
being maintained from one Frame to the next).
3. A receiving modem may be switched onto a channel before the distant transmitter has started up or may
be switched onto a channel where the transmitting station is already sending concatenated Frames.
5.3.2 Clock and Level Acquisition Procedures with RF Carrier Detect
When the receiving modem is enabled or switched onto a channel, it needs to establish the received symbol
levels, clock timing, and look for a Frame Sync pattern in the incoming signal. This is best done by the
following procedure:
1. Ensure that the Control Register's PLLBW bits are set to 'Wide' and the LEVRES bits to 'Level Track'.
2. Wait until a received carrier has been present for 8 symbol times. This 8-symbol delay gives time for the
received signal to propagate through the modem's RRC filter. An 'RF received 8 symbol times' qualifying
function can be included in a radio's carrier detect circuitry to take this into account.
3. Write a SFS or SFP task to the Command Register with the AQSC and the AQLEV bits set to '1'.
4. When the modem interrupts to signal that it has recognized a Frame Sync pattern (or completed the SFP
task) then change the PLLBW bits to 'Medium'.
Once the receiving modem has achieved level and symbol timing synchronization with a particular channel -
as evidenced by recognition of a Frame Sync pattern - then subsequent concatenated Frames can be read by
simply issuing SFS or SFP tasks at appropriate times, keeping the ASQSC and AQLEV bits at zero, and the
PLLBW and LEVRES bits at their current 'Medium' and 'Level Track' settings, respectively.
Noise
Symbol Sync
Frame Sync
Rest of Frame
Rx Signal from
FM discriminator
to Modem
8-Symbol delay
Set AQSC and AQLEV bits
to start Acquisition sequences
Level Measurement and Clock
Extraction Circuits
Increasing accuracy and lengthening response times
Figure 23: Acquisition Sequence Timing
5.3.3 Clock and Level Acquisition Procedure without RF Carrier Detect
It is also possible to use the modem in a non-standard system where there is an indeterminate delay between
the RF transmitter turn on time and the transmission moment of the Symbol Sync pattern, or where a receive
carrier detect signal is not available to the controlling PC, or where the transmitting terminal can send separate
unsynchronized Frames. In these cases, each Frame should be preceded by a Symbol Sync pattern, which
should be extended to about 100 symbols, and the procedure provided in Section 5.3.2.
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