CMX972 Datasheet, PDF (40/41 Pages) CML Microcircuits – Small 32-lead VQFN Package

Quadrature Demodulator with IF PLL/VCO
8.1.3.5 C-BUS
C-BUS Timings (See Figure 22)
t_CSE
CSN-Enable to Clock-High Time
t_CSH
Last Clock-High to CSN-High Time
t_LOZ
Clock-low to reply output enable time
t_HIZ
CSN-high to reply output 3-state time
t_CSOFF CSN-High Time between transactions
t_NXT
Inter-Byte Time
t_CK
Clock-Cycle Time
t_CH
Serial Clock (SCLK) - High Time
t_CL
Serial Clock (SCLK) - Low Time
t_RDS
Reply Data (RDATA) - Set-Up Time
t_RDH
Reply Data (RDATA) – Hold Time
t_CDS
Command Data (CDATA) - Set-Up Time
t_CDH
Command Data (CDATA) – Hold Time
Notes
Maximum 30pF load on each C-BUS interface line.
Min.
100
100
0.0
–
1.0
200
200
100
100
50.0
0.0
75.0
25.0
CMX972
Typ.
–
–
–
–
–
–
–
–
–
–
–
–
–
Max.
–
–
–
1.0
–
–
–
–
–
–
–
–
–
Units
ns
ns
ns
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
Note: Only 1 byte of data is used in CMX972 C-BUS transactions.
Figure 22 C-BUS Timing
 2015 CML Microsystems Plc
40
D/972/2