CMX972 Datasheet, PDF (20/41 Pages) CML Microcircuits – Small 32-lead VQFN Package

Quadrature Demodulator with IF PLL/VCO
CMX972
6 C-BUS Interface and Register Description
The C-BUS serial interface supports the transfer of control and status information between the CMX972’s
internal registers and an external host. Each C-BUS transaction consists of the host sending a single
Register Address byte, which may then be followed by zero or one data bytes that are written into the
corresponding CMX972 register, as illustrated in Figure 13.
Data sent from the host on the Command Data (CDATA) line is clocked into the CMX972 on the rising
edge of the Serial Clock (SCLK) input. The C-BUS interface is compatible with common µC/DSP serial
interfaces and may also be easily implemented with general-purpose I/O pins controlled by a simple
software routine. Section 8.1.3.5 gives the detailed C-BUS timing requirements.
Whether a C-BUS register is of read or write type is fixed for a given C-BUS register address, thus it is not
possible to read from and write to the same C-BUS register address.
In order to provide ease of addressing when using this device with other CML RF devices, the C-BUS
addresses below are arranged so as not to overlap those used on the other CML RF Devices. Thus, a
common chip select (CSN) signal can be used, as well as common CDATA, RDATA and SCLK signals.
Also note that the General Reset ($1A) command on the CMX972 differs from other CML devices (such as
CMX991/CMX992/CMX993/CMX998), which use $01 or $10 for this function.
The following C-BUS register addresses are used:
Write Only register:
General Reset Register (Address only, no data)
General Control Register, 8-bit write only
Rx Control Register, 8-bit write only
Rx Mode Register, 8-bit write only
Rx Offset Correction Register, 8-bit write only
IF PLL M Divider Register, 8-bit write only
IF PLL R Divider Register, 8-bit write only
VCO Control Register, 8-bit write only
Address $1A
Address $1B
Address $1C
Address $1D
Address $1F
Address $2A-$2C
Address $2D-$2E
Address $2F
Read Only register:
General Control Register, 8-bit read only
Rx Control Register, 8-bit read only
Rx Mode Register, 8-bit read only
Rx Offset Correction Register, 8-bit read only
IF PLL M Divider Register, 8-bit read only
IF PLL R Divider Register, 8-bit read only
VCO Control Register, 8-bit read only
Address $EB
Address $EC
Address $ED
Address $EF
Address $DA-$DC
Address $DD-$DE
Address $DF
Notes:
 The 8-bit write-only register ($1E), which is reserved for future use, defaults to 0x00 on power-up.
For minimum current consumption, this register should not be written to.
 All registers will retain data if VDD pin is held high, even if all other power supply pins are
disconnected.
 If clock and data lines are shared with other devices V_DD must be maintained in its normal
operating range otherwise ESD protection diodes may cause a problem with loading signals
connected to SCLK, RDATA and CDATA pins, preventing correct programming of other devices.
Other supplies may be turned off and all circuits on the device may be powered down without
causing this problem.
 2015 CML Microsystems Plc
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D/972/2