CMX972 Datasheet, PDF (33/41 Pages) CML Microcircuits – Small 32-lead VQFN Package

Quadrature Demodulator with IF PLL/VCO
CMX972
7.6 Operation with large input signals
The input 1dB gain compression point of the CMX972 will vary depending on the settings of the VGA and
VGB gain stages. Typical results with a 45 MHz signal, 50 ohm source, ‘straight in’ are as follows:
VGA = 0dB, VGB = 0dB
VGA = -18dB, VGB = 0dB
VGA = -18dB, VGB = -12dB
VGA = -18dB, VGB = -24dB
Input 1dB compression point = -42dBm
Input 1dB compression point = -25dBm
Input 1dB compression point = -12dBm
Input 1dB compression point = +5dBm
The above results are with the OUTDRV bit set to ‘1’ and the IMD5-IMD0 bits in register $2F=’000000’. For
optimum intermodulation performance the IMDn bits should be set to ‘111111’ which has the effect of
reducing the gain by about 1dB thus improving the input compression point by 1dB.
At high input signal levels the output of the CMX972 can start to reduce. Typical performance at maximum
and minimum gain settings is shown in Figure 20, measured at 45MHz, setting as above. The output level
is shown in dBm, this is measured by buffering the differential I/Q output signals (voltage), converting to
single-ended and then measuring as power based on 50 Ohms.
16
14
12
10
8
6
4
2
0
-60
Minimum Gain
Maximum Gain
-50
-40
-30
-20
-10
0
10
Input Level / dBm
Figure 20 Output Signal Level Variations with Large Input Signals
 2015 CML Microsystems Plc
33
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